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authorTamar Christina <tamar.christina@arm.com>2022-02-02 10:52:17 +0000
committerTamar Christina <tamar.christina@arm.com>2022-02-02 10:52:17 +0000
commit9f6f411f63f3aceddd846e4b0d27202a6e13d42c (patch)
tree5237a47438740f0ba78f073ce887a59b3d8d649a /gcc
parentab95fe61fea38fbac7f4e00abd32c2530532351a (diff)
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AArch32: use canonical ordering for complex mul, fma and fms
After the first patch in the series this updates the optabs to expect the canonical sequence. gcc/ChangeLog: PR tree-optimization/102819 PR tree-optimization/103169 * config/arm/vec-common.md (cml<fcmac1><conj_op><mode>4): Use canonical order.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/arm/vec-common.md14
1 files changed, 7 insertions, 7 deletions
diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
index cef358e..2718d82 100644
--- a/gcc/config/arm/vec-common.md
+++ b/gcc/config/arm/vec-common.md
@@ -265,18 +265,18 @@
;; remainder. Because of this, expand early.
(define_expand "cml<fcmac1><conj_op><mode>4"
[(set (match_operand:VF 0 "register_operand")
- (plus:VF (match_operand:VF 1 "register_operand")
- (unspec:VF [(match_operand:VF 2 "register_operand")
- (match_operand:VF 3 "register_operand")]
- VCMLA_OP)))]
+ (plus:VF (unspec:VF [(match_operand:VF 1 "register_operand")
+ (match_operand:VF 2 "register_operand")]
+ VCMLA_OP)
+ (match_operand:VF 3 "register_operand")))]
"(TARGET_COMPLEX || (TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT
&& ARM_HAVE_<MODE>_ARITH)) && !BYTES_BIG_ENDIAN"
{
rtx tmp = gen_reg_rtx (<MODE>mode);
- emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[1],
- operands[3], operands[2]));
+ emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[3],
+ operands[2], operands[1]));
emit_insn (gen_arm_vcmla<rotsplit2><mode> (operands[0], tmp,
- operands[3], operands[2]));
+ operands[2], operands[1]));
DONE;
})