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| author | Andrew Pinski <apinski@cavium.com> | 2015-02-11 10:18:45 +0000 |
|---|---|---|
| committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2015-02-11 02:18:45 -0800 |
| commit | 9c4f25cc11ab1b3a4d73a4db3905ec079d9d122a (patch) | |
| tree | 1e52b07a173878327939b9215ab71bb326c4e6bc /gcc | |
| parent | 386f7caea73f0d35ed0f7a8ae6e5d52740ab801e (diff) | |
| download | gcc-9c4f25cc11ab1b3a4d73a4db3905ec079d9d122a.zip gcc-9c4f25cc11ab1b3a4d73a4db3905ec079d9d122a.tar.gz gcc-9c4f25cc11ab1b3a4d73a4db3905ec079d9d122a.tar.bz2 | |
Fix bug 64893: ICE with vget_lane_u32 with C++ front-end
2015-02-11 Andrew Pinski <apinski@cavium.com>
PR target/64893
* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
Change the first argument type to size_type_node and add another
size_type_node.
(aarch64_simd_expand_builtin): Handle the new argument to
AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather
print an out when the first two arguments are not
nonzero integer constants.
* config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK):
Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi.
2015-02-11 Andrew Pinski <apinski@cavium.com>
PR target/64893
* c-c++-common/torture/aarch64-vect-lane-1.c: New testcase.
* c-c++-common/torture/aarch64-vect-lane-2.c: New testcase.
From-SVN: r220610
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 13 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-builtins.c | 25 | ||||
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 |
4 files changed, 38 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index be0365d..11530bf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2015-02-11 Andrew Pinski <apinski@cavium.com> + + PR target/64893 + * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins): + Change the first argument type to size_type_node and add another + size_type_node. + (aarch64_simd_expand_builtin): Handle the new argument to + AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather + print an out when the first two arguments are not + nonzero integer constants. + * config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK): + Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi. + 2015-02-11 Jakub Jelinek <jakub@redhat.com> PR target/61925 diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 87f1ac2..a9b3305 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -712,7 +712,8 @@ aarch64_init_simd_builtins (void) aarch64_init_simd_builtin_scalar_types (); tree lane_check_fpr = build_function_type_list (void_type_node, - intSI_type_node, + size_type_node, + size_type_node, intSI_type_node, NULL); aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK] = @@ -1001,13 +1002,23 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target) { if (fcode == AARCH64_SIMD_BUILTIN_LANE_CHECK) { - tree nlanes = CALL_EXPR_ARG (exp, 0); - gcc_assert (TREE_CODE (nlanes) == INTEGER_CST); - rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1)); - if (CONST_INT_P (lane_idx)) - aarch64_simd_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp); + rtx totalsize = expand_normal (CALL_EXPR_ARG (exp, 0)); + rtx elementsize = expand_normal (CALL_EXPR_ARG (exp, 1)); + if (CONST_INT_P (totalsize) && CONST_INT_P (elementsize) + && UINTVAL (elementsize) != 0 + && UINTVAL (totalsize) != 0) + { + rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 2)); + if (CONST_INT_P (lane_idx)) + aarch64_simd_lane_bounds (lane_idx, 0, + UINTVAL (totalsize) + / UINTVAL (elementsize), + exp); + else + error ("%Klane index must be a constant immediate", exp); + } else - error ("%Klane index must be a constant immediate", exp); + error ("%Ktotal size and element size must be a non-zero constant immediate", exp); /* Don't generate any RTL. */ return const0_rtx; } diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 2525a27..4c15312 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -541,7 +541,7 @@ typedef struct poly16x8x4_t #define __AARCH64_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0])) #define __AARCH64_LANE_CHECK(__vec, __idx) \ - __builtin_aarch64_im_lane_boundsi (__AARCH64_NUM_LANES (__vec), __idx) + __builtin_aarch64_im_lane_boundsi (sizeof(__vec), sizeof(__vec[0]), __idx) /* For big-endian, GCC's vector indices are the opposite way around to the architectural lane indices used by Neon intrinsics. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1abf3f9..d67d814 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2015-02-11 Andrew Pinski <apinski@cavium.com> + + PR target/64893 + * c-c++-common/torture/aarch64-vect-lane-1.c: New testcase. + * c-c++-common/torture/aarch64-vect-lane-2.c: New testcase. + 2015-02-11 Jakub Jelinek <jakub@redhat.com> PR target/61925 |