diff options
| author | H.J. Lu <hjl@gcc.gnu.org> | 2012-05-21 05:31:45 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2012-05-21 05:31:45 -0700 |
| commit | 9b5effa449611ed3e8360d4e3440c6cc00c70035 (patch) | |
| tree | 6a1375782ea7a99066680586a8f28d06eb850d6e /gcc | |
| parent | 47fb0e185a16682017f27eed5c46d8fdce6f968e (diff) | |
| download | gcc-9b5effa449611ed3e8360d4e3440c6cc00c70035.zip gcc-9b5effa449611ed3e8360d4e3440c6cc00c70035.tar.gz gcc-9b5effa449611ed3e8360d4e3440c6cc00c70035.tar.bz2 | |
Use unspec_volatile on rdrand<mode>_1
gcc/
PR target/53416
* config/i386/i386.md (UNSPEC_RDRAND): Renamed to ...
(UNSPECV_RDRAND): This.
(rdrand<mode>_1): Updated.
gcc/testsuite/
PR target/53416
* gcc.target/i386/pr53416.c: New file.
From-SVN: r187709
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr53416.c | 17 |
4 files changed, 35 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7d50aa4..3634b63 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-05-21 H.J. Lu <hongjiu.lu@intel.com> + + PR target/53416 + * config/i386/i386.md (UNSPEC_RDRAND): Renamed to ... + (UNSPECV_RDRAND): This. + (rdrand<mode>_1): Updated. + 2012-05-21 Richard Guenther <rguenther@suse.de> * tree-loop-distribution.c (can_generate_builtin): Reject diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 67281d8..8326ceb 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -176,9 +176,6 @@ ;; For CRC32 support UNSPEC_CRC32 - ;; For RDRAND support - UNSPEC_RDRAND - ;; For BMI support UNSPEC_BEXTR @@ -208,6 +205,9 @@ UNSPECV_WRFSBASE UNSPECV_WRGSBASE + ;; For RDRAND support + UNSPECV_RDRAND + ;; For RTM support UNSPECV_XBEGIN UNSPECV_XEND @@ -18403,9 +18403,9 @@ (define_insn "rdrand<mode>_1" [(set (match_operand:SWI248 0 "register_operand" "=r") - (unspec:SWI248 [(const_int 0)] UNSPEC_RDRAND)) + (unspec_volatile:SWI248 [(const_int 0)] UNSPECV_RDRAND)) (set (reg:CCC FLAGS_REG) - (unspec:CCC [(const_int 0)] UNSPEC_RDRAND))] + (unspec_volatile:CCC [(const_int 0)] UNSPECV_RDRAND))] "TARGET_RDRND" "rdrand\t%0" [(set_attr "type" "other") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 21bc466..3c82445 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2012-05-21 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/53416 + * gcc.target/i386/pr53416.c: New file. + 2012-05-21 Richard Guenther <rguenther@suse.de> * gfortran.dg/pr46519-2.f90: Adjust to avoid memset transform. diff --git a/gcc/testsuite/gcc.target/i386/pr53416.c b/gcc/testsuite/gcc.target/i386/pr53416.c new file mode 100644 index 0000000..68abe8b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr53416.c @@ -0,0 +1,17 @@ +/* PR target/53416 */ +/* { dg-options "-O2 -mrdrnd" } */ + +int test (void) +{ + unsigned int number = 0; + int result0, result1, result2, result3; + + result0 = __builtin_ia32_rdrand32_step (&number); + result1 = __builtin_ia32_rdrand32_step (&number); + result2 = __builtin_ia32_rdrand32_step (&number); + result3 = __builtin_ia32_rdrand32_step (&number); + + return result0 + result1 +result2 + result3; +} + +/* { dg-final { scan-assembler-times "rdrand" 4 } } */ |