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| author | Richard Earnshaw <rearnsha@arm.com> | 2009-10-30 09:16:36 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2009-10-30 09:16:36 +0000 |
| commit | 953a18fb42491340b946980207cd0453ca94231f (patch) | |
| tree | 2fec46398eab606f74b48f91eda97295b02b4549 /gcc | |
| parent | 649fb657d597922f0e0fa7647c22292a705e9859 (diff) | |
| download | gcc-953a18fb42491340b946980207cd0453ca94231f.zip gcc-953a18fb42491340b946980207cd0453ca94231f.tar.gz gcc-953a18fb42491340b946980207cd0453ca94231f.tar.bz2 | |
arm.md (QHSI): New mode iterator.
* arm.md (QHSI): New mode iterator.
(movqi): If generating for thumb, then truncate any immediate to
8 bits.
* thumb2.md (thumb2_movsi_shortim and peephole2 generator): Replace
with...
(thumb2_mov<mode>_shortim and peephole2 generator): ... iterator based
version.
From-SVN: r153739
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 8 | ||||
| -rw-r--r-- | gcc/config/arm/thumb2.md | 10 |
3 files changed, 23 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bc0413c..c060b6f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2009-10-30 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (QHSI): New mode iterator. + (movqi): If generating for thumb, then truncate any immediate to + 8 bits. + * thumb2.md (thumb2_movsi_shortim and peephole2 generator): Replace + with... + (thumb2_mov<mode>_shortim and peephole2 generator): ... iterator based + version. + 2009-10-29 Cary Coutant <ccoutant@google.com> PR debug/41700 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index d718c59..b8bf700 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -392,6 +392,9 @@ ; registers. (define_mode_iterator ANY64 [DI DF V8QI V4HI V2SI V2SF]) +;; The integer modes up to word size +(define_mode_iterator QHSI [QI HI SI]) + ;;--------------------------------------------------------------------------- ;; Predicates @@ -5848,6 +5851,11 @@ { rtx reg = gen_reg_rtx (SImode); + /* For thumb we want an unsigned immediate, then we are more likely + to be able to use a movs insn. */ + if (TARGET_THUMB) + operands[1] = GEN_INT (INTVAL (operands[1]) & 255); + emit_insn (gen_movsi (reg, operands[1])); operands[1] = gen_lowpart (QImode, reg); } diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 884d58c..82f75f9 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -1156,8 +1156,8 @@ ;; 16-bit load immediate (define_peephole2 - [(set (match_operand:SI 0 "low_register_operand" "") - (match_operand:SI 1 "const_int_operand" ""))] + [(set (match_operand:QHSI 0 "low_register_operand" "") + (match_operand:QHSI 1 "const_int_operand" ""))] "TARGET_THUMB2 && peep2_regno_dead_p(0, CC_REGNUM) && (unsigned HOST_WIDE_INT) INTVAL(operands[1]) < 256" @@ -1168,9 +1168,9 @@ "" ) -(define_insn "*thumb2_movsi_shortim" - [(set (match_operand:SI 0 "low_register_operand" "=l") - (match_operand:SI 1 "const_int_operand" "I")) +(define_insn "*thumb2_mov<mode>_shortim" + [(set (match_operand:QHSI 0 "low_register_operand" "=l") + (match_operand:QHSI 1 "const_int_operand" "I")) (clobber (reg:CC CC_REGNUM))] "TARGET_THUMB2 && reload_completed" "mov%!\t%0, %1" |