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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-11-10 09:43:21 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-11-10 09:47:29 +0000 |
| commit | 8da8b9225762126ca41b12243d6531cd41a831b3 (patch) | |
| tree | f0de8ae818758472e5868fe8a673304f01aeeb85 /gcc | |
| parent | fcddf7cee629b4505481ffdbb0403016bb142b6a (diff) | |
| download | gcc-8da8b9225762126ca41b12243d6531cd41a831b3.zip gcc-8da8b9225762126ca41b12243d6531cd41a831b3.tar.gz gcc-8da8b9225762126ca41b12243d6531cd41a831b3.tar.bz2 | |
amdgcn: Fix vector min/max ICE
The DImode min/max instructions need a clobber that SImode does not, so
add the special case to the reduction expand code.
gcc/ChangeLog:
* config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
min/max instructions.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/gcn/gcn.cc | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 6a2aaef..ac29925 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -5514,7 +5514,15 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec) { rtx tmp = gen_reg_rtx (mode); emit_insn (gen_dpp_move (mode, tmp, in, shift_val)); - emit_insn (gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in))); + rtx insn = gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in)); + if (scalar_mode == DImode) + { + rtx clobber = gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (DImode, VCC_REG)); + insn = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (2, insn, clobber)); + } + emit_insn (insn); } else { |