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| author | Oleg Endo <olegendo@gcc.gnu.org> | 2012-09-19 17:45:37 +0000 |
|---|---|---|
| committer | Oleg Endo <olegendo@gcc.gnu.org> | 2012-09-19 17:45:37 +0000 |
| commit | 8b75f5506f72b100a6ac1eff4f0fc1acfdf8566c (patch) | |
| tree | db880c87dd72ca339289fd9f9c340d9ba64dc8b2 /gcc | |
| parent | 689653125b420b235d91596a9055aae46ec69a58 (diff) | |
| download | gcc-8b75f5506f72b100a6ac1eff4f0fc1acfdf8566c.zip gcc-8b75f5506f72b100a6ac1eff4f0fc1acfdf8566c.tar.gz gcc-8b75f5506f72b100a6ac1eff4f0fc1acfdf8566c.tar.bz2 | |
re PR target/54236 ([SH] Improve addc and subc insn utilization)
PR target/54236
* config/sh/sh.md (*addc): Add pattern to handle one bit left shifts.
PR target/54236
* gcc.target/sh/pr54236-1.c (test_08): Add one bit left shift case.
From-SVN: r191489
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/sh/sh.md | 16 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/sh/pr54236-1.c | 11 |
4 files changed, 35 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d791861..b4d2311 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2012-09-19 Oleg Endo <olegendo@gcc.gnu.org> + PR target/54236 + * config/sh/sh.md (*addc): Add pattern to handle one bit left shifts. + +2012-09-19 Oleg Endo <olegendo@gcc.gnu.org> + * config/sh/sh.md (prologue, epilogue): Use braced strings. 2012-09-19 Eric Botcazou <ebotcazou@adacore.com> diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 3497ce8..71e758b 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1787,6 +1787,22 @@ (reg:SI T_REG))) (clobber (reg:SI T_REG))])]) +;; Left shifts by one are usually done with an add insn to avoid T_REG +;; clobbers. Thus addc can also be used to do something like '(x << 1) + 1'. +(define_insn_and_split "*addc" + [(set (match_operand:SI 0 "arith_reg_dest") + (plus:SI (mult:SI (match_operand:SI 1 "arith_reg_operand") + (const_int 2)) + (const_int 1))) + (clobber (reg:SI T_REG))] + "TARGET_SH1" + "#" + "&& 1" + [(set (reg:SI T_REG) (const_int 1)) + (parallel [(set (match_dup 0) (plus:SI (plus:SI (match_dup 1) (match_dup 1)) + (reg:SI T_REG))) + (clobber (reg:SI T_REG))])]) + ;; Sometimes combine will try to do 'reg + (0-reg) + 1' if the *addc pattern ;; matched. Split this up into a simple sub add sequence, as this will save ;; us one sett insn. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6c6fdf3..c4c041f84 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-09-19 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/54236 + * gcc.target/sh/pr54236-1.c (test_08): Add one bit left shift case. + 2012-09-19 Eric Botcazou <ebotcazou@adacore.com> * gcc.c-torture/execute/20120919-1.c: New test. diff --git a/gcc/testsuite/gcc.target/sh/pr54236-1.c b/gcc/testsuite/gcc.target/sh/pr54236-1.c index 3a7453c..748b6c9 100644 --- a/gcc/testsuite/gcc.target/sh/pr54236-1.c +++ b/gcc/testsuite/gcc.target/sh/pr54236-1.c @@ -4,9 +4,9 @@ /* { dg-do compile { target "sh*-*-*" } } */ /* { dg-options "-O1" } */ /* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */ -/* { dg-final { scan-assembler-times "addc" 3 } } */ +/* { dg-final { scan-assembler-times "addc" 4 } } */ /* { dg-final { scan-assembler-times "subc" 3 } } */ -/* { dg-final { scan-assembler-times "sett" 4 } } */ +/* { dg-final { scan-assembler-times "sett" 5 } } */ /* { dg-final { scan-assembler-times "negc" 1 } } */ /* { dg-final { scan-assembler-not "movt" } } */ @@ -74,3 +74,10 @@ test_07 (int *vec) return vi; } + +int +test_08 (int a) +{ + /* 1x addc, 1x sett */ + return (a << 1) + 1; +} |