re PR target/26778 (GCC4 moves the result of a conditional block through inadequate registers)

gcc:
2006-09-09  Paolo Bonzini  <bonzini@gnu.org>
	    Dale Johannesen  <dalej@apple.com>

	PR target/26778
	* regclass.c (struct reg_pref): Update documentation.
	(regclass): Set prefclass to NO_REGS if memory is the best option.
	(record_reg_classes): Cope with a prefclass set to NO_REGS.

gcc/testsuite:
2006-09-09  Eric Christopher  <echristo@apple.com>

	PR target/26778
	* gcc.target/i386/pr26778.c: New testcase.


Co-Authored-By: Dale Johannesen <dalej@apple.com>

From-SVN: r116798

4 files changed, 47 insertions, 4 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2e9ec69..9173772 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2006-09-09  Paolo Bonzini  <bonzini@gnu.org>
+	    Dale Johannesen  <dalej@apple.com>
+
+	PR target/26778
+	* regclass.c (struct reg_pref): Update documentation.
+	(regclass): Set prefclass to NO_REGS if memory is the best option.
+	(record_reg_classes): Cope with a prefclass set to NO_REGS.
+
 2006-09-08  Eric Christopher  <echristo@apple.com>
 
 	* config.gcc (i?86-*-darwin): Add 64-bit HWI support.
diff --git a/gcc/regclass.c b/gcc/regclass.c
index 7b2d5b1..8a0bab1 100644
--- a/gcc/regclass.c
+++ b/gcc/regclass.c
@@ -811,7 +811,8 @@ struct costs
 /* Structure used to record preferences of given pseudo.  */
 struct reg_pref
 {
-  /* (enum reg_class) prefclass is the preferred class.  */
+  /* (enum reg_class) prefclass is the preferred class.  May be
+     NO_REGS if no class is better than memory.  */
   char prefclass;
 
   /* altclass is a register class that we should use for allocating
@@ -1314,6 +1315,10 @@ regclass (rtx f, int nregs)
 		best = reg_class_subunion[(int) best][class];
 	    }
 
+	  /* If no register class is better than memory, use memory. */
+	  if (p->mem_cost < best_cost)
+	    best = NO_REGS;
+
 	  /* Record the alternate register class; i.e., a class for which
 	     every register in it is better than using memory.  If adding a
 	     class would make a smaller class (i.e., no union of just those
@@ -1524,7 +1529,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
 		     to what we would add if this register were not in the
 		     appropriate class.  */
 
-		  if (reg_pref)
+		  if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
 		    alt_cost
 		      += (may_move_in_cost[mode]
 			  [(unsigned char) reg_pref[REGNO (op)].prefclass]
@@ -1750,7 +1755,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
 		     to what we would add if this register were not in the
 		     appropriate class.  */
 
-		  if (reg_pref)
+		  if (reg_pref && reg_pref[REGNO (op)].prefclass != NO_REGS)
 		    alt_cost
 		      += (may_move_in_cost[mode]
 			  [(unsigned char) reg_pref[REGNO (op)].prefclass]
@@ -1836,7 +1841,8 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
 	  int class;
 	  unsigned int nr;
 
-	  if (regno >= FIRST_PSEUDO_REGISTER && reg_pref != 0)
+	  if (regno >= FIRST_PSEUDO_REGISTER && reg_pref != 0
+	      && reg_pref[regno].prefclass != NO_REGS)
 	    {
 	      enum reg_class pref = reg_pref[regno].prefclass;
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 96eebdf..cd0f6f7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-09-09  Paolo Bonzini  <bonzini@gnu.org>
+
+	PR testsuite/26778
+	* gcc.target/i386/pr26778.c: New testcase.
+
 2006-09-08  Eric Christopher  <echristo@apple.com>
 
 	* gcc.target/i386/20060512-3.c: Run test on ilp32 only.
@@ -528,6 +533,10 @@
 
 2006-08-17  Paolo Bonzini  <bonzini@gnu.org>
 
+	* gcc.dg/pr26570.c: Fix testcase.
+
+2006-08-17  Paolo Bonzini  <bonzini@gnu.org>
+
 	* PR c++/28573
 	* g++.dg/parse/offsetof6.C: New test.
 	* g++.dg/parse/offsetof6.C: New test.
diff --git a/gcc/testsuite/gcc.target/i386/pr26778.c b/gcc/testsuite/gcc.target/i386/pr26778.c
new file mode 100644
index 0000000..8a49db5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr26778.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target ilp32 } } */
+/* { dg-options "-O2 -march=pentium3" } */
+
+typedef union {
+  long long l;
+  double d;
+} db_number;
+
+double test(double x[3]) {
+  double th = x[1] + x[2];
+  if (x[2] != th - x[1]) {
+    db_number thdb;
+    thdb.d = th;
+    thdb.l++;
+    th = thdb.d;
+  }
+  return x[0] + th;
+}
+
+/* { dg-final { scan-assembler-not "mov.ps" } } */