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| author | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-12-13 16:45:10 +0800 |
|---|---|---|
| committer | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-12-13 16:51:10 +0800 |
| commit | 8ad0a7df8950cd07fb3b92b3da8007e5800a255a (patch) | |
| tree | 509e66890c3cfe8bec6a61f79c979e5e08f2f691 /gcc | |
| parent | 99cce60d0b8f3c3a77be8e1bb716f3e2fee37d46 (diff) | |
| download | gcc-8ad0a7df8950cd07fb3b92b3da8007e5800a255a.zip gcc-8ad0a7df8950cd07fb3b92b3da8007e5800a255a.tar.gz gcc-8ad0a7df8950cd07fb3b92b3da8007e5800a255a.tar.bz2 | |
rs6000: enable cbranchcc4
This patch enables "have_cbranchcc4" on rs6000 by defining a
"cbranchcc4" expander. "have_cbrnachcc4" is a flag in ifcvt.cc to
indicate if branching by CC bits is valid or not. With this flag
enabled, some branches can be optimized to conditional moves.
2022-12-07 Haochen Gui <guihaoc@linux.ibm.com>
gcc/
* config/rs6000/rs6000.md (cbranchcc4): New expander.
gcc/testsuite
* gcc.target/powerpc/cbranchcc4-1.c: New.
* gcc.target/powerpc/cbranchcc4-2.c: New.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c | 15 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c | 11 |
3 files changed, 36 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4bd1dfd..6011f5b 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11913,6 +11913,16 @@ DONE; }) +(define_expand "cbranchcc4" + [(set (pc) + (if_then_else (match_operator 0 "branch_comparison_operator" + [(match_operand 1 "cc_reg_operand") + (match_operand 2 "zero_constant")]) + (label_ref (match_operand 3)) + (pc)))] + "" + "") + (define_expand "cstore<mode>4_signed" [(use (match_operator 1 "signed_comparison_operator" [(match_operand:P 2 "gpc_reg_operand") diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c new file mode 100644 index 0000000..6c2cd13 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Verify there is no ICE with cbranchcc4 enabled. */ + +int foo (double d) +{ + if (d == 0.0) + return 0; + + d = ((d) >= 0 ? (d) : -(d)); + + if (d < 1.0) + return 1; +} diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c new file mode 100644 index 0000000..528ba1a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ +/* { dg-final { scan-rtl-dump "noce_try_store_flag_constants" "ce1" } } */ + +/* The inner branch should be detected by ifcvt then be converted to a setcc + with a plus by noce_try_store_flag_constants. */ + +int test (unsigned int a, unsigned int b) +{ + return (a < b ? 0 : (a > b ? 2 : 1)); +} |