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| author | Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl> | 1998-06-25 00:40:29 +0200 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1998-06-24 16:40:29 -0600 |
| commit | 8975220280e19103df314fc6cbf54a44824fdd83 (patch) | |
| tree | 1b095b46e1f5dc4f113f58e85bef3d80e30dee5c /gcc | |
| parent | c358412fe862074065968caec2e318a8b5d9f4ee (diff) | |
| download | gcc-8975220280e19103df314fc6cbf54a44824fdd83.zip gcc-8975220280e19103df314fc6cbf54a44824fdd83.tar.gz gcc-8975220280e19103df314fc6cbf54a44824fdd83.tar.bz2 | |
expr.c (expand_assignment): Rework address calculation for structure field members to expose more invariant...
* expr.c (expand_assignment): Rework address calculation for structure
field members to expose more invariant computations to the loop
optimizer.
(expand_expr): Likewise.
From-SVN: r20705
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/expr.c | 41 |
2 files changed, 48 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e6bfeb5..096ddb2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +1998-06-22 Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl> + + * expr.c (expand_assignment): Rework address calculation for structure + field members to expose more invariant computations to the loop + optimizer. + (expand_expr): Likewise. + Wed Jun 24 22:44:22 1998 Jeffrey A Law (law@cygnus.com) * local-alloc.c (block_alloc): Do not try to avoid false dependencies @@ -2920,6 +2920,26 @@ expand_assignment (to, from, want_value, suggest_reg) #endif } + if (GET_CODE (to_rtx) == MEM + && GET_MODE (to_rtx) == BLKmode + && bitsize + && (bitpos % bitsize) == 0 + && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 + && (alignment * BITS_PER_UNIT) == GET_MODE_ALIGNMENT (mode1)) + { + rtx temp = change_address (to_rtx, mode1, + plus_constant (XEXP (to_rtx, 0), + (bitpos / + BITS_PER_UNIT))); + if (GET_CODE (XEXP (temp, 0)) == REG) + to_rtx = temp; + else + to_rtx = change_address (to_rtx, mode1, + force_reg (GET_MODE (XEXP (temp, 0)), + XEXP (temp, 0))); + bitpos = 0; + } + to_rtx = change_address (to_rtx, VOIDmode, gen_rtx_PLUS (ptr_mode, XEXP (to_rtx, 0), force_reg (ptr_mode, offset_rtx))); @@ -5918,6 +5938,27 @@ expand_expr (exp, target, tmode, modifier) #endif } + if (GET_CODE (op0) == MEM + && GET_MODE (op0) == BLKmode + && bitsize + && (bitpos % bitsize) == 0 + && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0 + && (alignment * BITS_PER_UNIT) == GET_MODE_ALIGNMENT (mode1)) + { + rtx temp = change_address (op0, mode1, + plus_constant (XEXP (op0, 0), + (bitpos / + BITS_PER_UNIT))); + if (GET_CODE (XEXP (temp, 0)) == REG) + op0 = temp; + else + op0 = change_address (op0, mode1, + force_reg (GET_MODE (XEXP (temp, 0)), + XEXP (temp, 0))); + bitpos = 0; + } + + op0 = change_address (op0, VOIDmode, gen_rtx_PLUS (ptr_mode, XEXP (op0, 0), force_reg (ptr_mode, offset_rtx))); |