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| author | Kito Cheng <kito.cheng@sifive.com> | 2022-10-21 17:37:01 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-02-13 10:40:46 +0800 |
| commit | 89367e794613bdeb21df3e6fc0215f0acd553ef8 (patch) | |
| tree | 65ea9e1a31a4e4d98aa0d947b5bf3d27f6ad097b /gcc | |
| parent | 22ba8570e6343e10e4a82e837166e181a1abb21b (diff) | |
| download | gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.zip gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.tar.gz gcc-89367e794613bdeb21df3e6fc0215f0acd553ef8.tar.bz2 | |
RISC-V: Handle vlenb correctly in unwinding
gcc/ChangeLog:
* config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
(DWARF_FRAME_REGISTERS): New.
(DWARF_REG_TO_UNWIND_COLUMN): New.
libgcc/ChangeLog:
* config.host (riscv*-*-*): Add config/riscv/value-unwind.h.
* config/riscv/value-unwind.h: New.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 120faf1..5bc7f2f 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -1088,4 +1088,11 @@ extern void riscv_remove_unneeded_save_restore_calls (void); #define REGMODE_NATURAL_SIZE(MODE) riscv_regmode_natural_size (MODE) +#define RISCV_DWARF_VLENB (4096 + 0xc22) + +#define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER + 1 /* VLENB */) + +#define DWARF_REG_TO_UNWIND_COLUMN(REGNO) \ + ((REGNO == RISCV_DWARF_VLENB) ? (FIRST_PSEUDO_REGISTER + 1) : REGNO) + #endif /* ! GCC_RISCV_H */ |