i386-cpuid.h (bit_SSE3): New.

2006-11-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gcc.dg/i386-cpuid.h (bit_SSE3): New.
	(i386_get_cpuid): New function.
	(i386_cpuid_ecx): Likewise.
	(i386_cpuid_edx): Likewise.
	(i386_cpuid): Updated to call i386_cpuid_edx.

	* gcc.target/i386/sse3-addsubpd.c: New file.
	* gcc.target/i386/sse3-addsubps.c: Likewise.
	* gcc.target/i386/sse3-haddpd.c: Likewise.
	* gcc.target/i386/sse3-haddps.c: Likewise.
	* gcc.target/i386/sse3-hsubpd.c: Likewise.
	* gcc.target/i386/sse3-hsubps.c: Likewise.
	* gcc.target/i386/sse3-lddqu.c: Likewise.
	* gcc.target/i386/sse3-movddup.c: Likewise.
	* gcc.target/i386/sse3-movshdup.c: Likewise.
	* gcc.target/i386/sse3-movsldup.c: Likewise.

From-SVN: r119390

12 files changed, 1140 insertions, 11 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3a9def2..f16250d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,22 @@
+2006-11-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gcc.dg/i386-cpuid.h (bit_SSE3): New.
+	(i386_get_cpuid): New function.
+	(i386_cpuid_ecx): Likewise.
+	(i386_cpuid_edx): Likewise.
+	(i386_cpuid): Updated to call i386_cpuid_edx.
+
+	* gcc.target/i386/sse3-addsubpd.c: New file.
+	* gcc.target/i386/sse3-addsubps.c: Likewise.
+	* gcc.target/i386/sse3-haddpd.c: Likewise.
+	* gcc.target/i386/sse3-haddps.c: Likewise.
+	* gcc.target/i386/sse3-hsubpd.c: Likewise.
+	* gcc.target/i386/sse3-hsubps.c: Likewise.
+	* gcc.target/i386/sse3-lddqu.c: Likewise.
+	* gcc.target/i386/sse3-movddup.c: Likewise.
+	* gcc.target/i386/sse3-movshdup.c: Likewise.
+	* gcc.target/i386/sse3-movsldup.c: Likewise.
+
 2006-12-01  Dirk Mueller  <dmueller@suse.de>
 
 	* g++.dg/warn/Wreturn-type-4.C: New testcase.
diff --git a/gcc/testsuite/gcc.dg/i386-cpuid.h b/gcc/testsuite/gcc.dg/i386-cpuid.h
index dc300e4..952a7c0 100644
--- a/gcc/testsuite/gcc.dg/i386-cpuid.h
+++ b/gcc/testsuite/gcc.dg/i386-cpuid.h
@@ -2,6 +2,10 @@
    Used by 20020523-2.c and i386-sse-6.c, and possibly others.  */
 /* Plagarized from 20020523-2.c.  */
 
+/* %ecx */
+#define bit_SSE3 (1 << 0)
+
+/* %edx */
 #define bit_CMOV (1 << 15)
 #define bit_MMX (1 << 23)
 #define bit_SSE (1 << 25)
@@ -11,14 +15,14 @@
 #define NOINLINE __attribute__ ((noinline))
 #endif
 
-unsigned int i386_cpuid (void) NOINLINE;
-
-unsigned int NOINLINE
-i386_cpuid (void)
+static inline unsigned int
+i386_get_cpuid (unsigned int *ecx, unsigned int *edx)
 {
-  int fl1, fl2;
+  int fl1;
 
 #ifndef __x86_64__
+  int fl2;
+
   /* See if we can use cpuid.  On AMD64 we always can.  */
   __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;"
 	   "pushl %0; popfl; pushfl; popl %0; popfl"
@@ -42,15 +46,44 @@ i386_cpuid (void)
   if (fl1 == 0)
     return (0);
 
-  /* Invoke CPUID(1), return %edx; caller can examine bits to
+  /* Invoke CPUID(1), return %ecx and %edx; caller can examine bits to
      determine what's supported.  */
 #ifdef __x86_64__
-  __asm__ ("pushq %%rcx; pushq %%rbx; cpuid; popq %%rbx; popq %%rcx"
-	   : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc");
+  __asm__ ("pushq %%rbx; cpuid; popq %%rbx"
+	   : "=c" (*ecx), "=d" (*edx), "=a" (fl1) : "2" (1) : "cc");
 #else
-  __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx"
-	   : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc");
+  __asm__ ("pushl %%ebx; cpuid; popl %%ebx"
+	   : "=c" (*ecx), "=d" (*edx), "=a" (fl1) : "2" (1) : "cc");
 #endif
 
-  return fl2;
+  return 1;
+}
+
+unsigned int i386_cpuid_ecx (void) NOINLINE;
+unsigned int i386_cpuid_edx (void) NOINLINE;
+
+unsigned int NOINLINE
+i386_cpuid_ecx (void)
+{
+  unsigned int ecx, edx;
+  if (i386_get_cpuid (&ecx, &edx))
+    return ecx;
+  else
+    return 0;
+}
+
+unsigned int NOINLINE
+i386_cpuid_edx (void)
+{
+  unsigned int ecx, edx;
+  if (i386_get_cpuid (&ecx, &edx))
+    return edx;
+  else
+    return 0;
+}
+
+static inline unsigned int
+i386_cpuid (void)
+{
+  return i386_cpuid_edx ();
 }
diff --git a/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c b/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c
new file mode 100644
index 0000000..9906239
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-addsubpd.c
@@ -0,0 +1,107 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_addsubpd (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_loadu_pd (i1);
+  __m128d t2 = _mm_loadu_pd (i2);
+
+  t1 = _mm_addsub_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static void
+sse3_test_addsubpd_subsume (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_load_pd (i1);
+  __m128d t2 = _mm_load_pd (i2);
+
+  t1 = _mm_addsub_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static int
+chk_pd (double *v1, double *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 2; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static double p1[2] __attribute__ ((aligned(16)));
+static double p2[2] __attribute__ ((aligned(16)));
+static double p3[2];
+static double ck[2];
+
+double vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 4)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+
+      p2[0] = vals[i+2];
+      p2[1] = vals[i+3];
+
+      ck[0] = p1[0] - p2[0];
+      ck[1] = p1[1] + p2[1];
+
+      sse3_test_addsubpd (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+
+      sse3_test_addsubpd_subsume (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-addsubps.c b/gcc/testsuite/gcc.target/i386/sse3-addsubps.c
new file mode 100644
index 0000000..6c45af1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-addsubps.c
@@ -0,0 +1,111 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_addsubps (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_loadu_ps (i1);
+  __m128 t2 = _mm_loadu_ps (i2);
+
+  t1 = _mm_addsub_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static void
+sse3_test_addsubps_subsume (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_load_ps (i1);
+  __m128 t2 = _mm_load_ps (i2);
+
+  t1 = _mm_addsub_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static int
+chk_ps (float *v1, float *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 4; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static float p1[4] __attribute__ ((aligned(16)));
+static float p2[4] __attribute__ ((aligned(16)));
+static float p3[4];
+static float ck[4];
+
+static float vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 8)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+      p1[2] = vals[i+2];
+      p1[3] = vals[i+3];
+
+      p2[0] = vals[i+4];
+      p2[1] = vals[i+5];
+      p2[2] = vals[i+6];
+      p2[3] = vals[i+7];
+
+      ck[0] = p1[0] - p2[0];
+      ck[1] = p1[1] + p2[1];
+      ck[2] = p1[2] - p2[2];
+      ck[3] = p1[3] + p2[3];
+
+      sse3_test_addsubps (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+
+      sse3_test_addsubps_subsume (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-haddpd.c b/gcc/testsuite/gcc.target/i386/sse3-haddpd.c
new file mode 100644
index 0000000..a85f3b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-haddpd.c
@@ -0,0 +1,105 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_haddpd (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_loadu_pd (i1);
+  __m128d t2 = _mm_loadu_pd (i2);
+
+  t1 = _mm_hadd_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static void
+sse3_test_haddpd_subsume (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_load_pd (i1);
+  __m128d t2 = _mm_load_pd (i2);
+
+  t1 = _mm_hadd_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static int
+chk_pd (double *v1, double *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 2; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static double p1[2] __attribute__ ((aligned(16)));
+static double p2[2] __attribute__ ((aligned(16)));
+static double p3[2];
+static double ck[2];
+
+static double vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 4)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+
+      p2[0] = vals[i+2];
+      p2[1] = vals[i+3];
+
+      ck[0] = p1[0] + p1[1];
+      ck[1] = p2[0] + p2[1];
+
+      sse3_test_haddpd (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+
+      sse3_test_haddpd_subsume (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-haddps.c b/gcc/testsuite/gcc.target/i386/sse3-haddps.c
new file mode 100644
index 0000000..2914b38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-haddps.c
@@ -0,0 +1,111 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_haddps (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_loadu_ps (i1);
+  __m128 t2 = _mm_loadu_ps (i2);
+
+  t1 = _mm_hadd_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static void
+sse3_test_haddps_subsume (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_load_ps (i1);
+  __m128 t2 = _mm_load_ps (i2);
+
+  t1 = _mm_hadd_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static int
+chk_ps(float *v1, float *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 4; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static float p1[4] __attribute__ ((aligned(16)));
+static float p2[4] __attribute__ ((aligned(16)));
+static float p3[4];
+static float ck[4];
+
+static float vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test ()
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 8)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+      p1[2] = vals[i+2];
+      p1[3] = vals[i+3];
+
+      p2[0] = vals[i+4];
+      p2[1] = vals[i+5];
+      p2[2] = vals[i+6];
+      p2[3] = vals[i+7];
+
+      ck[0] = p1[0] + p1[1];
+      ck[1] = p1[2] + p1[3];
+      ck[2] = p2[0] + p2[1];
+      ck[3] = p2[2] + p2[3];
+
+      sse3_test_haddps (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+
+      sse3_test_haddps_subsume (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c b/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c
new file mode 100644
index 0000000..fcb1e9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-hsubpd.c
@@ -0,0 +1,105 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_hsubpd (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_loadu_pd (i1);
+  __m128d t2 = _mm_loadu_pd (i2);
+
+  t1 = _mm_hsub_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static void
+sse3_test_hsubpd_subsume (double *i1, double *i2, double *r)
+{
+  __m128d t1 = _mm_load_pd (i1);
+  __m128d t2 = _mm_load_pd (i2);
+
+  t1 = _mm_hsub_pd (t1, t2);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static int
+chk_pd (double *v1, double *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 2; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static double p1[2] __attribute__ ((aligned(16)));
+static double p2[2] __attribute__ ((aligned(16)));
+static double p3[2];
+static double ck[2];
+
+static double vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 4)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+
+      p2[0] = vals[i+2];
+      p2[1] = vals[i+3];
+
+      ck[0] = p1[0] - p1[1];
+      ck[1] = p2[0] - p2[1];
+
+      sse3_test_hsubpd (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+
+      sse3_test_hsubpd_subsume (p1, p2, p3);
+
+      fail += chk_pd (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-hsubps.c b/gcc/testsuite/gcc.target/i386/sse3-hsubps.c
new file mode 100644
index 0000000..e3b6327
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-hsubps.c
@@ -0,0 +1,113 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_hsubps (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_loadu_ps (i1);
+  __m128 t2 = _mm_loadu_ps (i2);
+
+  t1 = _mm_hsub_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static void
+sse3_test_hsubps_subsume (float *i1, float *i2, float *r)
+{
+  __m128 t1 = _mm_load_ps (i1);
+  __m128 t2 = _mm_load_ps (i2);
+
+  t1 = _mm_hsub_ps (t1, t2);
+
+  _mm_storeu_ps (r, t1);
+}
+
+static int
+chk_ps (float *v1, float *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 4; i++) {
+    if (v1[i] != v2[i]) {
+      n_fails += 1;
+    }
+  }
+
+  return n_fails;
+}
+
+static float p1[4] __attribute__ ((aligned(16)));
+static float p2[4] __attribute__ ((aligned(16)));
+static float p3[4];
+static float ck[4];
+
+static float vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 8)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+      p1[2] = vals[i+2];
+      p1[3] = vals[i+3];
+
+      p2[0] = vals[i+4];
+      p2[1] = vals[i+5];
+      p2[2] = vals[i+6];
+      p2[3] = vals[i+7];
+
+      ck[0] = p1[0] - p1[1];
+      ck[1] = p1[2] - p1[3];
+      ck[2] = p2[0] - p2[1];
+      ck[3] = p2[2] - p2[3];
+
+      sse3_test_hsubps (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+
+      sse3_test_hsubps_subsume (p1, p2, p3);
+
+      fail += chk_ps (ck, p3);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-lddqu.c b/gcc/testsuite/gcc.target/i386/sse3-lddqu.c
new file mode 100644
index 0000000..45c63e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-lddqu.c
@@ -0,0 +1,83 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_lddqu (double *i1, double *r)
+{
+  __m128i t1 = _mm_lddqu_si128 ((__m128i *) i1);
+
+  _mm_storeu_si128 ((__m128i *) r, t1);
+}
+
+static int
+chk_pd (double *v1, double *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 2; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static double p1[2];
+static double p2[2];
+static double ck[2];
+
+static double vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 2)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = vals[i+1];
+
+      sse3_test_lddqu (p1, p2);
+
+      ck[0] = p1[0];
+      ck[1] = p1[1];
+
+      fail += chk_pd (ck, p2);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-movddup.c b/gcc/testsuite/gcc.target/i386/sse3-movddup.c
new file mode 100644
index 0000000..96641c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-movddup.c
@@ -0,0 +1,139 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_movddup_mem (double *i1, double *r)
+{
+  __m128d t1 = _mm_loaddup_pd (i1);
+
+  _mm_storeu_pd (r, t1);
+}
+
+static double cnst1 [2] = {1.0, 1.0};
+
+static void
+sse3_test_movddup_reg (double *i1, double *r)
+{
+  __m128d t1 = _mm_loadu_pd (i1);
+  __m128d t2 = _mm_loadu_pd (&cnst1[0]);
+
+  t1  = _mm_mul_pd (t1, t2);
+  t2  = _mm_movedup_pd (t1);
+
+  _mm_storeu_pd (r, t2);
+}
+
+static void
+sse3_test_movddup_reg_subsume_unaligned (double *i1, double *r)
+{
+  __m128d t1 = _mm_loadu_pd (i1);
+  __m128d t2 = _mm_movedup_pd (t1);
+
+  _mm_storeu_pd (r, t2);
+}
+
+static void
+sse3_test_movddup_reg_subsume_ldsd (double *i1, double *r)
+{
+  __m128d t1 = _mm_load_sd (i1);
+  __m128d t2 = _mm_movedup_pd (t1);
+
+  _mm_storeu_pd (r, t2);
+}
+
+static void
+sse3_test_movddup_reg_subsume (double *i1, double *r)
+{
+  __m128d t1 = _mm_load_pd (i1);
+  __m128d t2 = _mm_movedup_pd (t1);
+
+  _mm_storeu_pd (r, t2);
+}
+
+static int
+chk_pd (double *v1, double *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 2; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static double p1[2] __attribute__ ((aligned(16)));
+static double p2[2];
+static double ck[2];
+
+static double vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 1)
+    {
+      p1[0] = vals[i+0];
+
+      ck[0] = p1[0];
+      ck[1] = p1[0];
+
+      sse3_test_movddup_mem (p1, p2);
+
+      fail += chk_pd (ck, p2);
+
+      sse3_test_movddup_reg (p1, p2);
+
+      fail += chk_pd (ck, p2);
+
+      sse3_test_movddup_reg_subsume (p1, p2);
+
+      fail += chk_pd (ck, p2);
+
+      sse3_test_movddup_reg_subsume_unaligned (p1, p2);
+
+      fail += chk_pd (ck, p2);
+
+      sse3_test_movddup_reg_subsume_ldsd (p1, p2);
+
+      fail += chk_pd (ck, p2);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-movshdup.c b/gcc/testsuite/gcc.target/i386/sse3-movshdup.c
new file mode 100644
index 0000000..88d4125
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-movshdup.c
@@ -0,0 +1,101 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_movshdup_reg (float *i1, float *r)
+{
+  __m128 t1 = _mm_loadu_ps (i1);
+  __m128 t2 = _mm_movehdup_ps (t1);
+
+  _mm_storeu_ps (r, t2);
+}
+
+static void
+sse3_test_movshdup_reg_subsume (float *i1, float *r)
+{
+  __m128 t1 = _mm_load_ps (i1);
+  __m128 t2 = _mm_movehdup_ps (t1);
+
+  _mm_storeu_ps (r, t2);
+}
+
+static int
+chk_ps (float *v1, float *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 4; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static float p1[4] __attribute__ ((aligned(16)));
+static float p2[4];
+static float ck[4];
+
+static float vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 2)
+    {
+      p1[0] = 0.0;
+      p1[1] = vals[i+0];
+      p1[2] = 1.0;
+      p1[3] = vals[i+1];
+
+      ck[0] = p1[1];
+      ck[1] = p1[1];
+      ck[2] = p1[3];
+      ck[3] = p1[3];
+
+      sse3_test_movshdup_reg (p1, p2);
+
+      fail += chk_ps (ck, p2);
+
+      sse3_test_movshdup_reg_subsume (p1, p2);
+
+      fail += chk_ps (ck, p2);
+    }
+
+  if (fail != 0)
+    abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse3-movsldup.c b/gcc/testsuite/gcc.target/i386/sse3-movsldup.c
new file mode 100644
index 0000000..a3128ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse3-movsldup.c
@@ -0,0 +1,102 @@
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse3" } */
+#include <pmmintrin.h>
+#include <stdlib.h>
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse3_test (void);
+
+int
+main ()
+{
+  unsigned long cpu_facilities;
+
+  cpu_facilities = i386_cpuid_ecx ();
+
+  /* Run SSE3 test only if host has SSE3 support.  */
+  if ((cpu_facilities & bit_SSE3))
+    sse3_test ();
+
+  exit (0);
+}
+
+static void
+sse3_test_movsldup_reg (float *i1, float *r)
+{
+  __m128 t1 = _mm_loadu_ps (i1);
+  __m128 t2 = _mm_moveldup_ps (t1);
+
+  _mm_storeu_ps (r, t2);
+}
+
+static void
+sse3_test_movsldup_reg_subsume (float *i1, float *r)
+{
+  __m128 t1 = _mm_load_ps (i1);
+  __m128 t2 = _mm_moveldup_ps (t1);
+
+  _mm_storeu_ps (r, t2);
+}
+
+static int
+chk_ps (float *v1, float *v2)
+{
+  int i;
+  int n_fails = 0;
+
+  for (i = 0; i < 4; i++)
+    if (v1[i] != v2[i])
+      n_fails += 1;
+
+  return n_fails;
+}
+
+static float p1[4] __attribute__ ((aligned(16)));
+static float p2[4];
+static float p3[4];
+static float ck[4];
+
+static float vals[80] =
+  {
+    100.0,  200.0, 300.0, 400.0, 5.0, -1.0, .345, -21.5,
+    1100.0, 0.235, 321.3, 53.40, 0.3, 10.0, 42.0, 32.52,
+    32.6,   123.3, 1.234, 2.156, 0.1, 3.25, 4.75, 32.44,
+    12.16,  52.34, 64.12, 71.13, -.1, 2.30, 5.12, 3.785,
+    541.3,  321.4, 231.4, 531.4, 71., 321., 231., -531.,
+    23.45,  23.45, 23.45, 23.45, 23.45, 23.45, 23.45, 23.45,
+    23.45,  -1.43, -6.74, 6.345, -20.1, -20.1, -40.1, -40.1,
+    1.234,  2.345, 3.456, 4.567, 5.678, 6.789, 7.891, 8.912,
+    -9.32,  -8.41, -7.50, -6.59, -5.68, -4.77, -3.86, -2.95,
+    9.32,  8.41, 7.50, 6.59, -5.68, -4.77, -3.86, -2.95
+  };
+
+static void
+sse3_test (void)
+{
+  int i;
+  int fail = 0;
+
+  for (i = 0; i < 80; i += 2)
+    {
+      p1[0] = vals[i+0];
+      p1[1] = 0.0;
+      p1[2] = vals[i+1];
+      p1[3] = 1.0;
+
+      ck[0] = p1[0];
+      ck[1] = p1[0];
+      ck[2] = p1[2];
+      ck[3] = p1[2];
+
+      sse3_test_movsldup_reg (p1, p2);
+
+      fail += chk_ps (ck, p2);
+
+      sse3_test_movsldup_reg_subsume (p1, p2);
+
+      fail += chk_ps (ck, p2);
+    }
+
+  if (fail != 0)
+    abort ();
+}