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| author | Jan Hubicka <hubicka@freesoft.cz> | 1999-04-14 02:51:30 +0200 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1999-04-13 18:51:30 -0600 |
| commit | 853c37e365f729d9ece936f0432138cbf1abdeb5 (patch) | |
| tree | 23e6b4d6bb9ef244bd07fa477eef1495c042f98f /gcc | |
| parent | 251f0fb86341a03db3eaf9e325b795c145fc7507 (diff) | |
| download | gcc-853c37e365f729d9ece936f0432138cbf1abdeb5.zip gcc-853c37e365f729d9ece936f0432138cbf1abdeb5.tar.gz gcc-853c37e365f729d9ece936f0432138cbf1abdeb5.tar.bz2 | |
i386.md (SImode logical compare): Avoid outputing non-pariable testw and testl on Pentium.
* i386.md (SImode logical compare): Avoid outputing non-pariable testw
and testl on Pentium.
(register and memory bit tests): Likewise.
(setcc, normal and reversed conditional branches): Use shorter
sequence for testing flags stored in EAX.
From-SVN: r26437
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 51 |
2 files changed, 48 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4897998..aa61163 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ Wed Apr 14 00:18:22 1999 Jan Hubicka <hubicka@freesoft.cz> + * i386.md (SImode logical compare): Avoid outputing non-pariable testw + and testl on Pentium. + (register and memory bit tests): Likewise. + (setcc, normal and reversed conditional branches): Use shorter + sequence for testing flags stored in EAX. + * i386.md (xorsi3): Do not output NOT instrctions on Pentium. (xorqi3): Likewise. (xorhi3): Likewise. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5ad2c17..b1b681d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -767,7 +767,10 @@ /* For small integers, we may actually use testb. */ if (GET_CODE (operands[1]) == CONST_INT && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])) - && (! REG_P (operands[0]) || QI_REG_P (operands[0]))) + && (! REG_P (operands[0]) || QI_REG_P (operands[0])) + /* A Pentium test is pairable only with eax. Not with ah or al. */ + && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM + || optimize_size)) { /* We may set the sign bit spuriously. */ @@ -5723,7 +5726,10 @@ else mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]); operands[1] = GEN_INT (mask); - if (QI_REG_P (operands[0])) + if (QI_REG_P (operands[0]) + /* A Pentium test is pairable only with eax. Not with ah or al. */ + && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM + || optimize_size)) { if ((mask & ~0xff) == 0) { @@ -5757,7 +5763,10 @@ else mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]); operands[1] = GEN_INT (mask); - if (! REG_P (operands[0]) || QI_REG_P (operands[0])) + if (! REG_P (operands[0]) || QI_REG_P (operands[0]) + /* A Pentium test is pairable only with eax. Not with ah or al. */ + && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM + || optimize_size)) { if ((mask & ~0xff) == 0) { @@ -5936,8 +5945,16 @@ else default: abort (); } - operands[3] = GEN_INT (c); - output_asm_insn (AS2 (testl,%3,%2), operands); + if (!TARGET_PENTIUM || optimize_size) + { + operands[3] = GEN_INT (c >> 8); + output_asm_insn (AS2 (test%B0,%3,%h2), operands); + } + else + { + operands[3] = GEN_INT (c); + output_asm_insn (AS2 (test%L0,%3,%2), operands); + } return eq ? AS1 (sete,%0) : AS1 (setne, %0); } @@ -6113,8 +6130,16 @@ else default: abort (); } - operands[3] = GEN_INT (c); - output_asm_insn (AS2 (testl,%3,%2), operands); + if (!TARGET_PENTIUM || optimize_size) + { + operands[3] = GEN_INT (c >> 8); + output_asm_insn (AS2 (test%B0,%3,%h2), operands); + } + else + { + operands[3] = GEN_INT (c); + output_asm_insn (AS2 (test%L0,%3,%2), operands); + } return eq ? AS1 (je,%l1) : AS1 (jne, %l1); } if ((cc_status.flags & CC_NO_OVERFLOW) && (code == LE || code == GT)) @@ -6167,8 +6192,16 @@ else default: abort (); } - operands[3] = GEN_INT (c); - output_asm_insn (AS2 (testl,%3,%2), operands); + if (!TARGET_PENTIUM || optimize_size) + { + operands[3] = GEN_INT (c >> 8); + output_asm_insn (AS2 (test%B0,%3,%h2), operands); + } + else + { + operands[3] = GEN_INT (c); + output_asm_insn (AS2 (test%L0,%3,%2), operands); + } return eq ? AS1 (je,%l1) : AS1 (jne, %l1); } if ((cc_status.flags & CC_NO_OVERFLOW) && (code == LE || code == GT)) |