Daily bump.

7 files changed, 295 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ac7999d..962a387 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,125 @@
+2023-10-27  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/112107
+	* ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
+	instead of INSN_P.
+
+2023-10-27  Andrew Stubbs  <ams@codesourcery.com>
+
+	PR target/112088
+	* config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
+	conflict.
+
+2023-10-27  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md
+	(vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
+	condition to silence the warnings.
+	(vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
+	* config/gcn/gcn.md (*movti_insn): Likewise.
+
+2023-10-27  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
+	ASM_OPERANDS.
+
+2023-10-27  Yangyu Chen  <chenyangyu@isrc.iscas.ac.cn>
+
+	* config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
+	(sifive_7_tune_info, thead_c906_tune_info): Likewise.
+
+2023-10-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
+	* config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
+	Define.
+	(expand_rawmemchr): Define.
+	* config/riscv/riscv-v.cc (force_vector_length_operand): Remove
+	static.
+	(expand_block_move): Move from here...
+	* config/riscv/riscv-string.cc (expand_block_move): ...to here.
+	(expand_rawmemchr): Add vectorized expander.
+	* internal-fn.cc (expand_RAWMEMCHR): Fix typo.
+
+2023-10-27  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	* ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
+	Process reg equivalence invariants.
+
+2023-10-27  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
+	i386: Fiy typo in "partial_memory_read_stall" tune option.
+
+2023-10-27  Victor Do Nascimento  <victor.donascimento@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_print_operand): Add
+	support for CONST_STRING.
+
+2023-10-27  Roger Sayle  <roger@nextmovesoftware.com>
+
+	PR target/110551
+	* config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
+	2 take "regiser_operand" and "nonimmediate_operand" respectively.
+	(<u>mulqihi3): Likewise.
+	(*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
+	matching the %d constraint.  Use umul_highpart RTX to represent
+	the highpart multiplication.
+	(*umul<mode><dwi>3_1):  Operand 2 should use regiser_operand
+	predicate, and "a" rather than "0" as operands 0 and 2 have
+	different modes.
+	(define_split): For mul to mulx conversion, use the new
+	umul_highpart RTX representation.
+	(*mul<mode><dwi>3_1):  Operand 1 should be register_operand
+	and the constraint %a as operands 0 and 1 have different modes.
+	(*<u>mulqihi3_1): Operand 1 should be register_operand matching
+	the constraint %0.
+	(define_peephole2): Providing widening multiplication variants
+	of the peephole2s that tweak highpart multiplication register
+	allocation.
+
+2023-10-27  Lewis Hyatt  <lhyatt@gmail.com>
+
+	PR preprocessor/87299
+	* toplev.cc (no_backend): New static global.
+	(finalize): Remove argument no_backend, which is now a
+	static global.
+	(process_options): Likewise.
+	(do_compile): Likewise.
+	(target_reinit): Don't do anything in preprocess-only mode.
+	(toplev::main): Adapt to no_backend change.
+	(toplev::finalize): Likewise.
+
+2023-10-27  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/101590
+	PR tree-optimization/94884
+	* match.pd (`(X BIT_OP Y) CMP X`): New pattern.
+
+2023-10-27  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/103861
+	* config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
+	V2HF/V2BF/V4HF/V4BFmode.
+	* config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
+	data_mode is V4HF/V2HFmode.
+	* config/i386/mmx.md (vec_cmpv4hfqi): New expander.
+	(vcond_mask_<mode>v4hi): Ditto.
+	(vcond_mask_<mode>qi): Ditto.
+	(vec_cmpv2hfqi): Ditto.
+	(vcond_mask_<mode>v2hi): Ditto.
+	(mmx_plendvb_<mode>): Add 2 combine splitters after the
+	patterns.
+	(mmx_pblendvb_v8qi): Ditto.
+	(<code>v2hi3): Add a combine splitter after the pattern.
+	(<code><mode>3): Ditto.
+	(<code>v8qi3): Ditto.
+	(<code><mode>3): Ditto.
+	* config/i386/sse.md (vcond<mode><mode>): Merge this with ..
+	(vcond<sseintvecmodelower><mode>): .. this into ..
+	(vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
+	and extend to V8BF/V16BF/V32BFmode.
+
 2023-10-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index fa62fe1..208e534 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20231027
+20231028
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 00fb22b..1be099d 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,12 @@
+2023-10-27  Lewis Hyatt  <lhyatt@gmail.com>
+
+	PR preprocessor/87299
+	* c-pragma.cc (init_pragma): Register `#pragma GCC target' and
+	related pragmas in preprocess-only mode, and enable early handling.
+	(c_reset_target_pragmas): New function refactoring code from...
+	(handle_pragma_reset_options): ...here.
+	* c-pragma.h (c_reset_target_pragmas): Declare.
+
 2023-10-26  David Malcolm  <dmalcolm@redhat.com>
 
 	* c-attribs.cc (c_common_attribute_table): Add
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 8cf5b1f..abde09c 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,29 @@
+2023-10-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111929
+	* init.cc (build_new_1): Remove unnecessary call to convert
+	on 'nelts'.  Use build2 instead of fold_build2 for
+	'outer_nelts_checks'.
+
+2023-10-27  Patrick Palka  <ppalka@redhat.com>
+
+	* cp-tree.h (maybe_warn_unparenthesized_assignment): Declare.
+	* semantics.cc (is_assignment_op_expr_p): Generalize to return
+	true for any assignment operator expression, not just one that
+	has been resolved to an operator overload.
+	(maybe_warn_unparenthesized_assignment): Factored out from ...
+	(maybe_convert_cond): ... here.
+	(finish_parenthesized_expr): Mention
+	maybe_warn_unparenthesized_assignment.
+	* typeck.cc (convert_for_assignment): Replace -Wparentheses
+	warning logic with maybe_warn_unparenthesized_assignment.
+
+2023-10-27  Lewis Hyatt  <lhyatt@gmail.com>
+
+	PR preprocessor/87299
+	* parser.cc (cp_lexer_new_main): Call c_reset_target_pragmas ()
+	after preprocessing is complete, before starting compilation.
+
 2023-10-26  liuhongt  <hongtao.liu@intel.com>
 
 	* typeck.cc (build_vec_cmp): Pass type of arg0 to
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 7dcd55f..19da5ba 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,24 @@
+2023-10-27  Harald Anlauf  <anlauf@gmx.de>
+	    Steven G. Kargl  <kargl@gcc.gnu.org>
+
+	PR fortran/104649
+	* decl.cc (gfc_match_formal_arglist): Handle conflicting declarations
+	of a MODULE PROCEDURE when one of the declarations is an alternate
+	return.
+
+2023-10-27  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/104625
+	* expr.cc (gfc_check_vardef_context): Check that the target
+	does have a vector index before emitting the specific error.
+	* match.cc (copy_ts_from_selector_to_associate): Ensure that
+	class valued operator expressions set the selector rank and
+	use the rank to provide the associate variable with an
+	appropriate array spec.
+	* resolve.cc (resolve_operator): Reduce stacked parentheses to
+	a single pair.
+	(fixup_array_ref): Extract selector symbol from parentheses.
+
 2023-10-26  Paul-Antoine Arras  <pa@codesourcery.com>
 	    Tobias Burnus  <tobias@codesourcery.com>
 
diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog
index fbb386f..5ecb9c4 100644
--- a/gcc/m2/ChangeLog
+++ b/gcc/m2/ChangeLog
@@ -1,3 +1,18 @@
+2023-10-27  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	PR modula2/111530
+	* gm2-libs-ch/cgetopt.c (cgetopt_cgetopt_long): Re-format.
+	(cgetopt_cgetopt_long_only): Re-format.
+	(cgetopt_SetOption):  Re-format and assign flag to NULL
+	if name is also NULL.
+	* gm2-libs/GetOpt.def (AddLongOption): Add index parameter
+	and change flag to be a VAR parameter rather than a pointer.
+	(GetOptLong): Re-format.
+	(GetOpt): Correct comment.
+	* gm2-libs/GetOpt.mod: Re-write to rely on cgetopt rather
+	than implement long option creation in GetOpt.
+	* gm2-libs/cgetopt.def (SetOption): has_arg type is INTEGER.
+
 2023-10-25  Gaius Mulley  <gaiusmod2@gmail.com>
 
 	PR modula2/111955
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ef12536..718345c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,104 @@
+2023-10-27  Patrick O'Neill  <patrick@rivosinc.com>
+
+	* gcc.target/riscv/stack_save_restore_2.c: Accept any number
+	after __riscv_save_ and __riscv_restore_.
+
+2023-10-27  Harald Anlauf  <anlauf@gmx.de>
+	    Steven G. Kargl  <kargl@gcc.gnu.org>
+
+	PR fortran/104649
+	* gfortran.dg/pr104649.f90: New test.
+
+2023-10-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111929
+	* g++.dg/template/non-dependent28a.C: New test.
+
+2023-10-27  Patrick Palka  <ppalka@redhat.com>
+
+	* g++.dg/template/new14.C: New test.
+
+2023-10-27  Patrick Palka  <ppalka@redhat.com>
+
+	* g++.dg/warn/Wparentheses-13.C: Strengthen by expecting that
+	we issue the -Wparentheses warnings ahead of time.
+	* g++.dg/warn/Wparentheses-23.C: Likewise.
+	* g++.dg/warn/Wparentheses-32.C: Remove xfails.
+
+2023-10-27  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	PR modula2/111530
+	* gm2/pimlib/run/pass/testgetopt.mod: New test.
+
+2023-10-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.dg/tree-prof/peel-2.c: Add
+	-fno-tree-loop-distribute-patterns.
+	* gcc.dg/tree-ssa/ldist-rawmemchr-1.c: Add riscv.
+	* gcc.dg/tree-ssa/ldist-rawmemchr-2.c: Ditto.
+	* gcc.target/riscv/rvv/rvv.exp: Add builtin directory.
+	* gcc.target/riscv/rvv/autovec/builtin/rawmemchr-1.c: New test.
+
+2023-10-27  Robin Dapp  <rdapp@ventanamicro.com>
+
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c: Remove
+	Float16.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-2.c: Ditto.
+	* lib/target-supports.exp: Add zvfh handling.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-zvfh-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt-zvfh-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt_run-zvfh-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_sqrt_run-zvfh-2.c: New test.
+
+2023-10-27  Paul-Antoine Arras  <pa@codesourcery.com>
+
+	* gfortran.dg/c_ptr_tests_20.f90: Moved to...
+	* gfortran.dg/gomp/c_ptr_tests_20.f90: ...here.
+	* gfortran.dg/c_ptr_tests_21.f90: Moved to...
+	* gfortran.dg/gomp/c_ptr_tests_21.f90: ...here.
+
+2023-10-27  Roger Sayle  <roger@nextmovesoftware.com>
+
+	PR target/110551
+	* gcc.target/i386/pr110551.c: New test case.
+
+2023-10-27  Lewis Hyatt  <lhyatt@gmail.com>
+
+	PR preprocessor/87299
+	* c-c++-common/pragma-target-1.c: New test.
+	* c-c++-common/pragma-target-2.c: New test.
+	* g++.target/i386/pr87299-1.C: New test.
+	* g++.target/i386/pr87299-2.C: New test.
+	* gcc.target/i386/pr87299-1.c: New test.
+	* gcc.target/i386/pr87299-2.c: New test.
+	* gcc.target/s390/target-attribute/tattr-2b.c: New test.
+	* gcc.target/aarch64/pragma_cpp_predefs_1b.c: New test.
+	* gcc.target/arm/pragma_arch_attribute_1b.c: New test.
+	* gcc.target/nios2/custom-fp-2b.c: New test.
+	* gcc.target/powerpc/float128-3b.c: New test.
+
+2023-10-27  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/104625
+	* gfortran.dg/pr104625.f90: New test.
+	* gfortran.dg/associate_55.f90: Change error check.
+
+2023-10-27  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/101590
+	PR tree-optimization/94884
+	* gcc.dg/tree-ssa/bitcmp-1.c: New test.
+	* gcc.dg/tree-ssa/bitcmp-2.c: New test.
+	* gcc.dg/tree-ssa/bitcmp-3.c: New test.
+	* gcc.dg/tree-ssa/bitcmp-4.c: New test.
+	* gcc.dg/tree-ssa/bitcmp-5.c: New test.
+	* gcc.dg/tree-ssa/bitcmp-6.c: New test.
+
+2023-10-27  liuhongt  <hongtao.liu@intel.com>
+
+	* g++.target/i386/part-vect-vcondhf.C: New test.
+	* gcc.target/i386/part-vect-vec_cmphf.c: New test.
+
 2023-10-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	PR target/111318