RISC-V: Add regression test for vsetvl bug pr113429

The reduced testcase for pr113429 (cam4 failure) needed additional
modules so it wasn't committed.
The fuzzer found a c testcase that was also fixed with pr113429's fix.
Adding it as a regression test.

	PR target/113429

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/pr113429.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

1 files changed, 70 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
new file mode 100644
index 0000000..05c3eee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr113429.c
@@ -0,0 +1,70 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */
+
+long a;
+int b, c, d, e, f, g;
+short h, i, j;
+static int k = 3;
+static int l = 6;
+int m[5][7];
+signed char n;
+int *const o = &c;
+
+signed char(p)(signed char p1, signed char q) {
+  return p1 / q;
+}
+
+void s(unsigned p1) {
+  b = (b ^ p1) & 255;
+}
+
+static long t() {
+  long u;
+  signed char v;
+  d = 1;
+  for (; d <= 4; d++) {
+    j = 0;
+    for (; j <= 4; j++) {
+      v = 0;
+      for (; v <= 4; v++) {
+        if (m[v][v])
+          continue;
+        c = 0;
+        for (; c <= 4; c++) {
+          n = 0;
+          for (; n <= 4; n++) {
+            int *w = &e;
+            long r = v;
+            u = r == 0 ? a : a % r;
+            h |= u;
+            *w = g;
+            --m[n][c];
+            f &= *o;
+          }
+        }
+        if (p((i < 3) ^ 9, k))
+          ;
+        else if (v)
+          return 0;
+      }
+    }
+  }
+  return 1;
+}
+
+static char x() {
+  for (;;) {
+    t();
+    if (l)
+      return 0;
+  }
+}
+
+int main() {
+  x();
+  s(e & 255);
+  if (b == 0)
+    return 0;
+  else
+    return 1;
+}