Document ARM specific command line switches.

From-SVN: r23209

2 files changed, 48 insertions, 31 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7ee925e..c39081d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Wed Oct 21 09:15:06 1998  Nick Clifton  <nickc@cygnus.com>
+
+	* config/arm/arm.h (TARGET_SWITCHES): Document arm specific
+	command line switches.
+
 Tue Oct 20 10:04:51 1998  Graham  <grahams@rcp.co.uk>
 
 	* reload.c (loc_mentioned_in_p): Add missing braces to bind
@@ -343,8 +348,6 @@ Fri Oct 16 15:26:24 1998  Dave Brolley  <brolley@cygnus.com>
 
         * c-lex.c (yylex): Fix unaligned access of wchar_t.
 
->>>>>>> 1.2326
->>>>>>> 1.2342
 Fri Oct 16 10:47:53 1998  Nick Clifton  <nickc@cygnus.com>
 
 	* config/arm/arm.h (TARGET_SWITCHES): Add --help documentation.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index c9127e7..960c140 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -301,7 +301,7 @@ extern char *target_fp_name;
 #define ARM_FLAG_BIG_END      (0x0800)
 
 /* Nonzero if we should compile for Thumb interworking.  */
-#define ARM_FLAG_THUMB                (0x1000)
+#define ARM_FLAG_THUMB          (0x1000)
 
 /* Nonzero if we should have little-endian words even when compiling for
    big-endian (for backwards compatibility with older versions of GCC).  */
@@ -331,33 +331,47 @@ extern char *target_fp_name;
 
 #define TARGET_SWITCHES  				\
 {                         				\
-  {"apcs",			ARM_FLAG_APCS_FRAME},	\
-  {"apcs-frame",		ARM_FLAG_APCS_FRAME, "Generate APCS conformant stack frames" },	\
-  {"no-apcs-frame",	       -ARM_FLAG_APCS_FRAME},	\
-  {"poke-function-name",	ARM_FLAG_POKE},		\
-  {"fpe",			ARM_FLAG_FPE},		\
-  {"6",				ARM_FLAG_ARM6},		\
-  {"2",				ARM_FLAG_ARM3},		\
-  {"3",				ARM_FLAG_ARM3},		\
-  {"apcs-32",			ARM_FLAG_APCS_32, "Use the 32bit version of the APCS" },	\
-  {"apcs-26",		       -ARM_FLAG_APCS_32, "Use the 26bit version of the APCS" },	\
-  {"apcs-stack-check",		ARM_FLAG_APCS_STACK},	\
-  {"no-apcs-stack-check",      -ARM_FLAG_APCS_STACK},	\
-  {"apcs-float",		ARM_FLAG_APCS_FLOAT, "Pass FP arguments in FP registers" },	\
-  {"no-apcs-float",	       -ARM_FLAG_APCS_FLOAT},	\
-  {"apcs-reentrant",		ARM_FLAG_APCS_REENT, "Generate re-entrant, PIC code" },	\
-  {"no-apcs-reentrant",	       -ARM_FLAG_APCS_REENT},	\
-  {"short-load-bytes",		ARM_FLAG_SHORT_BYTE, "Load shorts a byte at a time" },	\
-  {"no-short-load-bytes",      -ARM_FLAG_SHORT_BYTE},	\
-  {"short-load-words",	       -ARM_FLAG_SHORT_BYTE, "Load words a byte at a time" },	\
-  {"no-short-load-words",	ARM_FLAG_SHORT_BYTE},	\
-  {"soft-float",		ARM_FLAG_SOFT_FLOAT, "Use library calls to perform FP operations" },	\
-  {"hard-float",	       -ARM_FLAG_SOFT_FLOAT, "Use hardware floating point instructions" },	\
-  {"big-endian",		ARM_FLAG_BIG_END, "Assume target CPU is configured as big endian" },	\
-  {"little-endian",	       -ARM_FLAG_BIG_END, "Assume target CPU is configured as little endian" },	\
-  {"words-little-endian",       ARM_FLAG_LITTLE_WORDS, "Assume big endian bytes, little endian words" },	\
-  {"thumb-interwork",		ARM_FLAG_THUMB, "Support calls between THUMB and ARM instructions sets" },	\
-  {"no-thumb-interwork",       -ARM_FLAG_THUMB},	\
+  {"apcs",			ARM_FLAG_APCS_FRAME, "" }, \
+  {"apcs-frame",		ARM_FLAG_APCS_FRAME, 	\
+     "Generate APCS conformant stack frames" },		\
+  {"no-apcs-frame",	       -ARM_FLAG_APCS_FRAME, "" }, \
+  {"poke-function-name",	ARM_FLAG_POKE, 		\
+     "Store function names in object code" },		\
+  {"fpe",			ARM_FLAG_FPE,  "" },	\
+  {"6",				ARM_FLAG_ARM6, "" },	\
+  {"2",				ARM_FLAG_ARM3, "" },	\
+  {"3",				ARM_FLAG_ARM3, "" },	\
+  {"apcs-32",			ARM_FLAG_APCS_32, 	\
+     "Use the 32bit version of the APCS" },		\
+  {"apcs-26",		       -ARM_FLAG_APCS_32, 	\
+     "Use the 26bit version of the APCS" },		\
+  {"apcs-stack-check",		ARM_FLAG_APCS_STACK, "" }, \
+  {"no-apcs-stack-check",      -ARM_FLAG_APCS_STACK, "" }, \
+  {"apcs-float",		ARM_FLAG_APCS_FLOAT, 	\
+     "Pass FP arguments in FP registers" },		\
+  {"no-apcs-float",	       -ARM_FLAG_APCS_FLOAT, "" }, \
+  {"apcs-reentrant",		ARM_FLAG_APCS_REENT, 	\
+     "Generate re-entrant, PIC code" },			\
+  {"no-apcs-reentrant",	       -ARM_FLAG_APCS_REENT, "" }, \
+  {"short-load-bytes",		ARM_FLAG_SHORT_BYTE, 	\
+     "Load shorts a byte at a time" },			\
+  {"no-short-load-bytes",      -ARM_FLAG_SHORT_BYTE, "" }, \
+  {"short-load-words",	       -ARM_FLAG_SHORT_BYTE, 	\
+     "Load words a byte at a time" },			\
+  {"no-short-load-words",	ARM_FLAG_SHORT_BYTE, "" }, \
+  {"soft-float",		ARM_FLAG_SOFT_FLOAT, 	\
+     "Use library calls to perform FP operations" },	\
+  {"hard-float",	       -ARM_FLAG_SOFT_FLOAT, 	\
+     "Use hardware floating point instructions" },	\
+  {"big-endian",		ARM_FLAG_BIG_END, 	\
+     "Assume target CPU is configured as big endian" },	\
+  {"little-endian",	       -ARM_FLAG_BIG_END, 	\
+     "Assume target CPU is configured as little endian" }, \
+  {"words-little-endian",       ARM_FLAG_LITTLE_WORDS, 	\
+     "Assume big endian bytes, little endian words" },	\
+  {"thumb-interwork",		ARM_FLAG_THUMB, 	\
+     "Support calls between THUMB and ARM instructions sets" },	\
+  {"no-thumb-interwork",       -ARM_FLAG_THUMB, "" },	\
   SUBTARGET_SWITCHES					\
   {"",				TARGET_DEFAULT }	\
 }
@@ -366,7 +380,7 @@ extern char *target_fp_name;
 {					\
   {"cpu=",  & arm_select[1].string, "Specify the name of the target CPU" },	\
   {"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
-  {"tune=", & arm_select[3].string},	\
+  {"tune=", & arm_select[3].string, "" },	\
   {"fp=",   & target_fp_name, "Specify the version of the floating point emulator"} \
 }