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| author | Jeff Law <jlaw@ventanamicro.com> | 2024-01-21 19:12:21 -0700 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro.com> | 2024-01-21 19:12:21 -0700 |
| commit | 7e16f819ff413c48702f9087b62eaac39a060a14 (patch) | |
| tree | 5b72120b9ece5fb57268f4aca79397aec3597ba6 /gcc | |
| parent | d9ed3ac20e893f4e278a1e3db073b715096c7879 (diff) | |
| download | gcc-7e16f819ff413c48702f9087b62eaac39a060a14.zip gcc-7e16f819ff413c48702f9087b62eaac39a060a14.tar.gz gcc-7e16f819ff413c48702f9087b62eaac39a060a14.tar.bz2 | |
[committed] Adjust expectations for pr59533-1.c
The change for pr111267 twiddled code generation for sh/pr59533-1.c
We end up eliminating two comparisons, but require two shll instructions to do
so. And in a couple places we're using an addc sequence rather than a subc
sequence. This patch adjusts the expected codegen for the test as all those
are either a wash or a
The fwprop change does cause some code regressions on the same test. I'll file
a distinct but for that issue.
gcc/testsuite
* gcc.target/sh/pr59533-1.c: Adjust expected output.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/sh/pr59533-1.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/sh/pr59533-1.c b/gcc/testsuite/gcc.target/sh/pr59533-1.c index b046985..859b8e2 100644 --- a/gcc/testsuite/gcc.target/sh/pr59533-1.c +++ b/gcc/testsuite/gcc.target/sh/pr59533-1.c @@ -2,15 +2,15 @@ /* { dg-do compile } */ /* { dg-options "-O1" } */ -/* { dg-final { scan-assembler-times "shll" 1 } } */ +/* { dg-final { scan-assembler-times "shll" 3 } } */ /* { dg-final { scan-assembler-times "movt" 5 } } */ /* { dg-final { scan-assembler-times "rotcl" 1 } } */ /* { dg-final { scan-assembler-times "and" 3 } } */ /* { dg-final { scan-assembler-times "extu.b" 5 } } */ -/* { dg-final { scan-assembler-times "cmp/pz" 27 { target { ! sh2a } } } } */ -/* { dg-final { scan-assembler-times "addc" 4 { target { ! sh2a } } } } */ -/* { dg-final { scan-assembler-times "subc" 16 { target { ! sh2a } } } } */ +/* { dg-final { scan-assembler-times "cmp/pz" 25 { target { ! sh2a } } } } */ +/* { dg-final { scan-assembler-times "addc" 6 { target { ! sh2a } } } } */ +/* { dg-final { scan-assembler-times "subc" 14 { target { ! sh2a } } } } */ /* { dg-final { scan-assembler-times "cmp/pz" 25 { target { sh2a } } } } */ /* { dg-final { scan-assembler-times "addc" 6 { target { sh2a } } } } */ |