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| author | Michael Poole <poole@troilus.org> | 2000-08-15 09:29:31 -0600 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 2000-08-15 09:29:31 -0600 |
| commit | 7c2720799c132883ff07e297c87e07cbed575787 (patch) | |
| tree | 4cbc70b3d9ccb6c2910da937d070ccc289dd2227 /gcc | |
| parent | 7a6bd5ae0eacf36eaf26d37466eb5efe805f0aae (diff) | |
| download | gcc-7c2720799c132883ff07e297c87e07cbed575787.zip gcc-7c2720799c132883ff07e297c87e07cbed575787.tar.gz gcc-7c2720799c132883ff07e297c87e07cbed575787.tar.bz2 | |
tm.texi (Register Classes): Clarify order of sub-initializers in REG_CLASS_CONTENTS.
* tm.texi (Register Classes): Clarify order of sub-initializers
in REG_CLASS_CONTENTS.
Ho hum...
From-SVN: r35718
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/tm.texi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gcc/tm.texi b/gcc/tm.texi index 25cc96c..b6b9316 100644 --- a/gcc/tm.texi +++ b/gcc/tm.texi @@ -1828,6 +1828,9 @@ When the machine has more than 32 registers, an integer does not suffice. Then the integers are replaced by sub-initializers, braced groupings containing several integers. Each sub-initializer must be suitable as an initializer for the type @code{HARD_REG_SET} which is defined in @file{hard-reg-set.h}. +In this situation, the first integer in each sub-initializer corresponds to +registers 0 through 31, the second integer to registers 32 through 63, and +so on. @findex REGNO_REG_CLASS @item REGNO_REG_CLASS (@var{regno}) |