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| author | liuhongt <hongtao.liu@intel.com> | 2023-04-03 10:54:55 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-04-19 13:23:29 +0800 |
| commit | 727be65ec40e119a7c864bfaa5d6a73547863c06 (patch) | |
| tree | 3d35c883aacdfedd3a58d43cc5ed10066f0a4de8 /gcc | |
| parent | d5cd3eada416a89e6478b1b1c874115574eb19a8 (diff) | |
| download | gcc-727be65ec40e119a7c864bfaa5d6a73547863c06.zip gcc-727be65ec40e119a7c864bfaa5d6a73547863c06.tar.gz gcc-727be65ec40e119a7c864bfaa5d6a73547863c06.tar.bz2 | |
Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg classes.
There's a potential performance issue when backend returns some
unreasonable value for the mode which can be never be allocate with
reg class.
gcc/ChangeLog:
PR rtl-optimization/109351
* ira.cc (setup_class_subset_and_memory_move_costs): Check
hard_regno_mode_ok before setting lowest memory move cost for
the mode with different reg classes.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ira.cc | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -588,6 +588,10 @@ setup_class_subset_and_memory_move_costs (void) /* Costs for NO_REGS are used in cost calculation on the 1st pass when the preferred register classes are not known yet. In this case we take the best scenario. */ + if (!targetm.hard_regno_mode_ok (ira_class_hard_regs[cl][0], + (machine_mode) mode)) + continue; + if (ira_memory_move_cost[mode][NO_REGS][0] > ira_memory_move_cost[mode][cl][0]) ira_max_memory_move_cost[mode][NO_REGS][0] |