rs6000-c: Add support for built-in functions vector unsigned long long vec_bperm (vector...

gcc/ChangeLog:

2017-05-16  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c: Add support for built-in functions
	vector unsigned long long vec_bperm (vector unsigned long long,
	                                     vector unsigned char)
	vector signed long long vec_mule (vector signed int,
	                                  vector signed int)
	vector unsigned long long vec_mule (vector unsigned int,
	                                    vector unsigned int)
	vector signed long long vec_mulo (vector signed int,
	                                  vector signed int)
	vector unsigned long long vec_mulo (vector unsigned int,
	                                    vector unsigned int)
	vector signed char vec_sldw (vector signed char,
	                             vector signed char,
	                             const int)
	vector unsigned char vec_sldw (vector unsigned char,
	                               vector unsigned char,
	                               const int)
	vector signed short vec_sldw (vector signed short,
	                              vector signed short,
	                              const int)
	vector unsigned short vec_sldw (vector unsigned short,
	                                vector unsigned short,
	                                const int)
	vector signed int vec_sldw (vector signed int,
	                            vector signed int,
	                            const int)
	vector unsigned int vec_sldw (vector unsigned int,
	                              vector unsigned int,
	                              const int)
	vector signed long long vec_sldw (vector signed long long,
	                                  vector signed long long,
	                                  const int)
	vector unsigned long long vec_sldw (vector unsigned long long,
	                                    vector unsigned long long,
	                                    const int)
	* config/rs6000/rs6000-c: Add support for built-in functions
	* config/rs6000/rs6000-builtin.def: Add definition for SLDW.
	* config/rs6000/altivec.h: Add defintion for vec_sldw.
	* doc/extend.texi: Update the built-in documentation for the
	new built-in functions.

gcc/testsuite/ChangeLog:

2017-05-16  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-3.c: New vec_mule, vec_mulo test cases.
	* gcc.target/powerpc/builtins-3-p8.c: Add tests for the new Power 8
	built-ins to the test suite file.  Note, support for mradds exists
	but no test case exists.
	* gcc.target/powerpc/builtins-3-p9.c: Add tests for the new Power 9
	built-ins to the test suite file.

From-SVN: r248125

9 files changed, 256 insertions, 28 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e5c872c..1cdda6d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,46 @@
+2017-05-16  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/rs6000-c: Add support for built-in functions
+	vector unsigned long long vec_bperm (vector unsigned long long,
+	                                     vector unsigned char)
+	vector signed long long vec_mule (vector signed int,
+	                                  vector signed int)
+	vector unsigned long long vec_mule (vector unsigned int,
+	                                    vector unsigned int)
+	vector signed long long vec_mulo (vector signed int,
+	                                  vector signed int)
+	vector unsigned long long vec_mulo (vector unsigned int,
+	                                    vector unsigned int)
+	vector signed char vec_sldw (vector signed char,
+	                             vector signed char,
+	                             const int)
+	vector unsigned char vec_sldw (vector unsigned char,
+	                               vector unsigned char,
+	                               const int)
+	vector signed short vec_sldw (vector signed short,
+	                              vector signed short,
+	                              const int)
+	vector unsigned short vec_sldw (vector unsigned short,
+	                                vector unsigned short,
+	                                const int)
+	vector signed int vec_sldw (vector signed int,
+	                            vector signed int,
+	                            const int)
+	vector unsigned int vec_sldw (vector unsigned int,
+	                              vector unsigned int,
+	                              const int)
+	vector signed long long vec_sldw (vector signed long long,
+	                                  vector signed long long,
+	                                  const int)
+	vector unsigned long long vec_sldw (vector unsigned long long,
+	                                    vector unsigned long long,
+	                                    const int)
+	* config/rs6000/rs6000-c: Add support for built-in functions
+	* config/rs6000/rs6000-builtin.def: Add definition for SLDW.
+	* config/rs6000/altivec.h: Add defintion for vec_sldw.
+	* doc/extend.texi: Update the built-in documentation for the
+	new built-in functions.
+
 2017-05-16  Marek Polacek  <polacek@redhat.com>
 
 	PR sanitizer/80536
diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index c334d9f..c92bcce 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -247,6 +247,7 @@
 #define vec_sel __builtin_vec_sel
 #define vec_sl __builtin_vec_sl
 #define vec_sld __builtin_vec_sld
+#define vec_sldw __builtin_vsx_xxsldwi
 #define vec_sll __builtin_vec_sll
 #define vec_slo __builtin_vec_slo
 #define vec_splat __builtin_vec_splat
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 41186b1..ebe005a 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1502,6 +1502,7 @@ BU_ALTIVEC_OVERLOAD_X (LVSR,	   "lvsr")
 BU_ALTIVEC_OVERLOAD_X (MUL,	   "mul")
 BU_ALTIVEC_OVERLOAD_X (PROMOTE,	   "promote")
 BU_ALTIVEC_OVERLOAD_X (SLD,	   "sld")
+BU_ALTIVEC_OVERLOAD_X (SLDW,	   "sldw")
 BU_ALTIVEC_OVERLOAD_X (SPLAT,	   "splat")
 BU_ALTIVEC_OVERLOAD_X (SPLATS,	   "splats")
 BU_ALTIVEC_OVERLOAD_X (ST,	   "st")
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index a0536d6..8039814 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -2182,6 +2182,11 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
     RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
+    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB,
@@ -2197,6 +2202,11 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
+    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
     RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH,
     RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
@@ -3457,6 +3467,30 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE },
   { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI,
+    RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI,
+    RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_16QI,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI,
+    RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI,
+    RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_8HI,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI,
+    RS6000_BTI_unsigned_V8HI, RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI,
+    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI,
+    RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_4SI,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_unsigned_V4SI, RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI,
+    RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI,
+    RS6000_BTI_NOT_OPAQUE },
+  { ALTIVEC_BUILTIN_VEC_SLDW, VSX_BUILTIN_XXSLDWI_2DI,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_NOT_OPAQUE },
   { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF,
     RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF },
   { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
@@ -4451,6 +4485,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, 0 },
 
   { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
     RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
   { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI,
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index c737634..3511d25 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -16321,6 +16321,10 @@ vector signed short vec_mule (vector signed char,
 vector unsigned int vec_mule (vector unsigned short,
                               vector unsigned short);
 vector signed int vec_mule (vector signed short, vector signed short);
+vector unsigned int vec_mule (vector unsigned int,
+                              vector unsigned int);
+vector signed int vec_mule (vector signed int,
+                            vector signed int);
 
 vector signed int vec_vmulesh (vector signed short,
                                vector signed short);
@@ -16340,6 +16344,7 @@ vector signed short vec_mulo (vector signed char, vector signed char);
 vector unsigned int vec_mulo (vector unsigned short,
                               vector unsigned short);
 vector signed int vec_mulo (vector signed short, vector signed short);
+vector unsigned int vec_mulo (vector unsigned short, vector unsigned short);
 
 vector signed int vec_vmulosh (vector signed short,
                                vector signed short);
@@ -16641,6 +16646,31 @@ vector bool char vec_sld (vector bool char,
                           vector bool char,
                           const int);
 
+vector signed char vec_sldw (vector signed char,
+                             vector signed char,
+                             const int);
+vector unsigned char vec_sldw (vector unsigned char,
+                               vector unsigned char,
+                               const int);
+vector signed short vec_sldw (vector signed short,
+                              vector signed short,
+                              const int);
+vector unsigned short vec_sldw (vector unsigned short,
+                                vector unsigned short,
+                                const int);
+vector signed int vec_sldw (vector signed int,
+                            vector signed int,
+                            const int);
+vector unsigned int vec_sldw (vector unsigned int,
+                              vector unsigned int,
+                              const int);
+vector signed long long vec_sldw (vector signed long long,
+                                  vector signed long long,
+                                  const int);
+vector unsigned long long vec_sldw (vector unsigned long long,
+                                    vector unsigned long long,
+                                    const int);
+
 vector signed int vec_sll (vector signed int,
                            vector unsigned int);
 vector signed int vec_sll (vector signed int,
@@ -17909,6 +17939,8 @@ vector long long vec_vbpermq (vector signed char, vector signed char);
 vector long long vec_vbpermq (vector unsigned char, vector unsigned char);
 
 vector unsigned char vec_bperm (vector unsigned char, vector unsigned char);
+vector unsigned char vec_bperm (vector unsigned long long,
+                                vector unsigned char);
 vector unsigned long long vec_bperm (vector unsigned __int128,
                                      vector unsigned char);
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 13e8cf9..29208f3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2017-05-16  Carl Love  <cel@us.ibm.com>
+
+	* gcc.target/powerpc/builtins-3.c: New vec_mule, vec_mulo test cases.
+	* gcc.target/powerpc/builtins-3-p8.c: Add tests for the new Power 8
+	built-ins to the test suite file.  Note, support for mradds exists
+	but no test case exists.
+	* gcc.target/powerpc/builtins-3-p9.c: Add tests for the new Power 9
+	built-ins to the test suite file.
+
 2017-05-16  Marek Polacek  <polacek@redhat.com>
 
 	PR sanitizer/80536
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
index b0f6929..3baa1d8 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
@@ -16,12 +16,6 @@ test_pack_float (vector double x, vector double y)
   return vec_pack (x, y);
 }
 
-vector long long
-test_nabs_long_long (vector long long x)
-{
-  return vec_nabs (x);
-}
-
 vector signed int
 test_vsi_packs_vsll_vsll (vector signed long long x,
                           vector signed long long y)
@@ -36,12 +30,6 @@ test_vui_packs_vull_vull (vector unsigned long long x,
   return vec_packs (x, y);
 }
 
-vector long long
-test_neg_long_long (vector long long x)
-{
-	return vec_neg (x);
-}
-
 vector unsigned char
 test_unsigned_char_popcnt_signed_char (vector signed char x)
 {
@@ -90,35 +78,34 @@ test_unsigned_long_long_popcnt_unsigned_long (vector unsigned long long x)
 	return vec_popcnt (x);
 }
 
+vector signed short
+test_vss_mradds_vss_vss (vector signed short x, vector signed short y,
+                         vector signed short z)
+{
+	return vec_mradds (x, y, z);
+}
+
 /* Expected test results:
 
      test_eq_long_long                         1 vcmpequd inst
      test_pack_float                           1 vpkudum inst
-     test_nabs_long_long                       1 vspltisw, 1 vsubudm, 1 vminsd
      test_vsi_packs_vsll_vsll                  1 vpksdss
      test_vui_packs_vull_vull                  1 vpkudus
-     test_neg_long_long                        1 vspltisw, 1 vsubudm 
-     test_eq_long_long                         1 vcmpequd inst
-     test_pack_float                           1 vpkudum inst
-     test_nabs_long_long                       1 vspltisw, 1 vsubudm, 1 vminsd
-     test_neg_long_long                        1 vspltisw, 1 vsubudm
      test_unsigned_char_popcnt_signed_char     1 vpopcntb
      test_unsigned_char_popcnt_unsigned_char   1 vpopcntb
      test_unsigned_short_popcnt_signed_short   1 vpopcnth
      test_unsigned_short_popcnt_unsigned_short 1 vpopcnth
-     test_unsigned_signed_popcnt_signed_int    1 vpopcntw
-     test_unsigned_signed_popcnt_unsigned_int  1 vpopcntw
-     test_unsigned_signed_popcnt_signed_long   1 vpopcntd
-     test_unsigned_signed_popcnt_unsigned_long 1 vpopcntd */
+     test_unsigned_int_popcnt_signed_int       2 vpopcntw
+     test_unsigned_int_popcnt_unsigned_int     1 vpopcntd
+     test_unsigned_long_long_popcnt_unsigned_long 1 vpopcntd
+     test_vss_mradds_vss_vsss                  1 vmhraddshs */
 
 /* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
 /* { dg-final { scan-assembler-times "vpkudum"  1 } } */
-/* { dg-final { scan-assembler-times "vspltisw" 2 } } */
-/* { dg-final { scan-assembler-times "vsubudm"  2 } } */
-/* { dg-final { scan-assembler-times "vminsd"   1 } } */
 /* { dg-final { scan-assembler-times "vpksdss"  1 } } */
 /* { dg-final { scan-assembler-times "vpkudus"  1 } } */  
 /* { dg-final { scan-assembler-times "vpopcntb" 2 } } */
 /* { dg-final { scan-assembler-times "vpopcnth" 2 } } */
 /* { dg-final { scan-assembler-times "vpopcntw" 2 } } */
 /* { dg-final { scan-assembler-times "vpopcntd" 2 } } */
+/* { dg-final { scan-assembler-times "vmhraddshs"  1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c
index e3db2da..46a31ae 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c
@@ -28,15 +28,44 @@ test_ne_long (vector bool long long x, vector bool long long y)
 	return vec_cmpne (x, y);
 }
 
+vector long long
+test_nabs_long_long (vector long long x)
+{
+  return vec_nabs (x);
+}
+
+vector long long
+test_neg_long_long (vector long long x)
+{
+	return vec_neg (x);
+}
+
+vector unsigned long long
+test_vull_bperm_vull_vuc (vector unsigned long long x,
+                          vector unsigned char y)
+{
+	return vec_bperm (x, y);
+}
+
 /* Expected test results:
 
      test_ne_char              1 vcmpneb
      test_ne_short             1 vcmpneh
      test_ne_int               1 vcmpnew
-     test_ne_long              1 vcmpequd, 1 xxlnor inst */
+     test_ne_long              1 vcmpequd, 1 xxlnor inst
+     test_nabs_long_long       1 xxspltib, 1 vsubudm, 1 vminsd
+     test_neg_long_long        1 vnegd
+     test_vull_bperm_vull_vuc  1 vbpermd
+
 
 /* { dg-final { scan-assembler-times "vcmpneb"  1 } } */
 /* { dg-final { scan-assembler-times "vcmpneh"  1 } } */
 /* { dg-final { scan-assembler-times "vcmpnew"  1 } } */
 /* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor"   1 } } */
+/* { dg-final { scan-assembler-times "xxspltib" 1 } } */
+/* { dg-final { scan-assembler-times "vsubudm"  1 } } */
+/* { dg-final { scan-assembler-times "vminsd"   1 } } */
+/* { dg-final { scan-assembler-times "vnegd"    1 } } */
+/* { dg-final { scan-assembler-times "vbpermd"  1 } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3.c b/gcc/testsuite/gcc.target/powerpc/builtins-3.c
index 1549329..5cbac81 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3.c
@@ -112,6 +112,81 @@ test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
 	return vec_slo (x, y);
 }
 
+vector signed int
+test_vsi_mule_vsi_vsi (vector signed int x, vector signed int y)
+{
+	return vec_mule (x, y);
+}
+
+vector unsigned int
+test_vui_mule_vui_vui (vector unsigned int x, vector unsigned int y)
+{
+	return vec_mule (x, y);
+}
+
+vector signed int
+test_vsi_mulo_vsi_vsi (vector signed int x, vector signed int y)
+{
+	return vec_mulo (x, y);
+}
+
+vector unsigned int
+test_vui_mulo_vui_vui (vector unsigned int x, vector unsigned int y)
+{
+	return vec_mulo (x, y);
+}
+
+vector signed char
+test_vsc_sldw_vsc_vsc (vector signed char x, vector signed char y)
+{
+	return vec_sldw (x, y, 1);
+}
+
+vector unsigned char
+test_vuc_sldw_vuc_vuc (vector unsigned char x, vector unsigned char y)
+{
+	return vec_sldw (x, y, 3);
+}
+
+vector signed short int
+test_vssi_sldw_vssi_vssi (vector signed short int x,
+                          vector signed short int y)
+{
+	return vec_sldw (x, y, 1);
+}
+
+vector unsigned short int
+test_vusi_sldw_vusi_vusi (vector unsigned short int x,
+                          vector unsigned short int y)
+{
+	return vec_sldw (x, y, 3);
+}
+
+vector signed int
+test_vsi_sldw_vsi_vsi (vector signed int x, vector signed int y)
+{
+	return vec_sldw (x, y, 1);
+}
+
+vector unsigned int
+test_vui_sldw_vui_vui (vector unsigned int x, vector unsigned int y)
+{
+	return vec_sldw (x, y, 3);
+}
+
+vector signed long long
+test_vsl_sldw_vsl_vsl (vector signed long long x, vector signed long long y)
+{
+	return vec_sldw (x, y, 1);
+}
+
+vector unsigned long long
+test_vul_sldw_vul_vul (vector unsigned long long x,
+                       vector unsigned long long y)
+{
+	return vec_sldw (x, y, 3);
+}
+
 /* Expected test results:
 
      test_eq_char              1 vcmpequb inst
@@ -131,7 +206,19 @@ test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
      test_vsll_slo_vsll_vsc    1 vslo
      test_vsll_slo_vsll_vuc    1 vslo
      test_vull_slo_vsll_vsc    1 vslo
-     test_vull_slo_vsll_vuc    1 vslo */
+     test_vull_slo_vsll_vuc    1 vslo
+     test_vsi_mulo_vsi_vsi     1 vmulosh
+     test_vui_mulo_vui_vui     1 vmulosh
+     test_vsi_mule_vsi_vsi     1 vmulesh
+     test_vui_mule_vui_vui     1 vmulesh
+     test_vsc_mulo_vsc_vsc     1 xxsldwi
+     test_vuc_mulo_vuc_vuc     1 xxsldwi
+     test_vssi_mulo_vssi_vssi  1 xxsldwi
+     test_vusi_mulo_vusi_vusi  1 xxsldwi
+     test_vsi_mulo_vsi_vsi     1 xxsldwi
+     test_vui_mulo_vui_vui     1 xxsldwi
+     test_vsl_mulo_vsl_vsl     1 xxsldwi
+     test_vul_mulo_vul_vul     1 xxsldwi */
 
 /* { dg-final { scan-assembler-times "vcmpequb" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpequh" 1 } } */
@@ -149,4 +236,6 @@ test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
 /* { dg-final { scan-assembler-times "xvnegsp"  1 } } */
 /* { dg-final { scan-assembler-times "xvnegdp"  1 } } */
 /* { dg-final { scan-assembler-times "vslo"     4 } } */
-
+/* { dg-final { scan-assembler-times "vmulosh"  2 } } */
+/* { dg-final { scan-assembler-times "vmulesh"  2 } } */
+/* { dg-final { scan-assembler-times "xxsldwi"  8 } } */