diff options
author | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-02-05 00:17:56 +0000 |
---|---|---|
committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-02-05 00:17:56 +0000 |
commit | 72319171e1bb9ec1ecf19b382a67735e4efe0987 (patch) | |
tree | c75ba320d3848d4e8a56f1df764146d462a481e2 /gcc | |
parent | 260a22de4fa3d4ad3bb0d3ef2cd45d7f03eb3160 (diff) | |
download | gcc-72319171e1bb9ec1ecf19b382a67735e4efe0987.zip gcc-72319171e1bb9ec1ecf19b382a67735e4efe0987.tar.gz gcc-72319171e1bb9ec1ecf19b382a67735e4efe0987.tar.bz2 |
Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 47 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/d/ChangeLog | 21 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 |
4 files changed, 74 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 32e16d3..4cbc90d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,50 @@ +2024-02-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> + + * config/xtensa/xtensa.md (*eqne_zero_masked_bits): + Add missing ":SI" to the match_operator. + +2024-02-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> + + * config/xtensa/xtensa.md (SHI): New mode iterator. + (2 split patterns related to constsynth): + Change to also accept HImode operands. + +2024-02-04 Jeff Law <jlaw@ventanamicro.com> + + * config/riscv/riscv.cc (riscv_rtx_costs): Handle SUBREG and REG + similarly. + +2024-02-04 Xi Ruoyao <xry111@xry111.site> + + * config/loongarch/lsx.md (neg<mode:FLSX>2): Remove the + incorrect expand. + * config/loongarch/simd.md (simdfmt_as_i): New define_mode_attr. + (elmsgnbit): Likewise. + (neg<mode:FVEC>2): New define_insn. + * config/loongarch/lasx.md (negv4df2, negv8sf2): Remove as they + are now instantiated in simd.md. + +2024-02-04 Xi Ruoyao <xry111@xry111.site> + + * config/loongarch/loongarch.cc (loongarch_symbol_insns): Do not + use LSX_SUPPORTED_MODE_P or LASX_SUPPORTED_MODE_P if mode is + MAX_MACHINE_MODE. + +2024-02-04 Li Wei <liwei@loongson.cn> + + * config/loongarch/loongarch.cc (loongarch_expand_vselect): Adjust. + (loongarch_expand_vselect_vconcat): Ditto. + (loongarch_try_expand_lsx_vshuf_const): New, use vshuf to implement + all 128-bit constant permutation situations. + (loongarch_expand_lsx_shuffle): Adjust and rename function name. + (loongarch_is_imm_set_shuffle): Renamed function name. + (loongarch_expand_vec_perm_even_odd): Function forward declaration. + (loongarch_expand_vec_perm_even_odd_1): Add implement for 128-bit + extract-even and extract-odd permutations. + (loongarch_is_odd_extraction): Delete. + (loongarch_is_even_extraction): Ditto. + (loongarch_expand_vec_perm_const): Adjust. + 2024-02-03 Jakub Jelinek <jakub@redhat.com> PR middle-end/113722 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 038ebd2..a53d85f 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240204 +20240205 diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog index 04bac02..45dd031 100644 --- a/gcc/d/ChangeLog +++ b/gcc/d/ChangeLog @@ -1,3 +1,24 @@ +2024-02-04 Iain Buclaw <ibuclaw@gdcproject.org> + + * dmd/MERGE: Merge upstream dmd a6f1083699. + * dmd/VERSION: Bump version to v2.107.0 + * Make-lang.in (D_FRONTEND_OBJS): Add d/pragmasem.o. + * d-builtins.cc (strip_type_modifiers): Update for new front-end + interface. + * d-codegen.cc (declaration_type): Likewise. + (parameter_type): Likewise. + * d-target.cc (TargetCPP::parameterType): Likewise. + * expr.cc (ExprVisitor::visit (IndexExp *)): Likewise. + (ExprVisitor::visit (VarExp *)): Likewise. + (ExprVisitor::visit (AssocArrayLiteralExp *)): Likewise. + * runtime.cc (get_libcall_type): Likewise. + * typeinfo.cc (TypeInfoVisitor::visit (TypeInfoConstDeclaration *)): + Likewise. + (TypeInfoVisitor::visit (TypeInfoInvariantDeclaration *)): Likewise. + (TypeInfoVisitor::visit (TypeInfoSharedDeclaration *)): Likewise. + (TypeInfoVisitor::visit (TypeInfoWildDeclaration *)): Likewise. + * types.cc (build_ctype): Likewise. + 2024-02-03 Iain Buclaw <ibuclaw@gdcproject.org> * dmd/MERGE: Merge upstream dmd e770945277. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index aff4a6e..5748a98 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2024-02-04 Jeff Law <jlaw@ventanamicro.com> + + * gcc.target/riscv/reg_subreg_costs.c: New test. + Co-authored-by: Jivan Hakobyan <jivanhakobyan9@gmail.com> + 2024-02-03 John David Anglin <danglin@gcc.gnu.org> * gcc.dg/pr84877.c: Adjust xfail parentheses. |