Remove MaskExists property from config/*/*.opt files

2012-03-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/arm/arm.opt (mapcs): Remove MaskExists.
	* config/cris/linux.opt (mno-gotplt): Likewise.
	* config/i386/i386.opt (mhard-float): Likewise.
	(msse4): Likewise.
	(mno-sse4): Likewise.
	* config/m68k/m68k.opt (mhard-float): Likewise.
	* config/mep/mep.op (mcop32): Likewise.
	* config/pa/pa-hpux.opt (msio): Likewise.
	* config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
	* config/picochip/picochip.opt (mlittle): Likewise.
	* config/sh/sh.opt (mrenesas): Likewise.
	* config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
	* config/sparc/sparc.opt (mhard-float): Likewise.
	* config/v850/v850.opt (mv850es): Likewise.
	* config/vax/vax.opt (mg-float): Likewise.

From-SVN: r185893

15 files changed, 34 insertions, 16 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 729f51f..2376541 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,21 @@
+2012-03-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/arm/arm.opt (mapcs): Remove MaskExists.
+	* config/cris/linux.opt (mno-gotplt): Likewise.
+	* config/i386/i386.opt (mhard-float): Likewise.
+	(msse4): Likewise.
+	(mno-sse4): Likewise.
+	* config/m68k/m68k.opt (mhard-float): Likewise.
+	* config/mep/mep.op (mcop32): Likewise.
+	* config/pa/pa-hpux.opt (msio): Likewise.
+	* config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
+	* config/picochip/picochip.opt (mlittle): Likewise.
+	* config/sh/sh.opt (mrenesas): Likewise.
+	* config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
+	* config/sparc/sparc.opt (mhard-float): Likewise.
+	* config/v850/v850.opt (mv850es): Likewise.
+	* config/vax/vax.opt (mg-float): Likewise.
+
 2012-03-27  Martin Jambor  <mjambor@suse.cz>
 
 	PR middle-end/52693
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 934aa35..e03a163 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN)
 Generate a call to abort if a noreturn function returns
 
 mapcs
-Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
+Target RejectNegative Mask(APCS_FRAME) Undocumented
 
 mapcs-float
 Target Report Mask(APCS_FLOAT)
diff --git a/gcc/config/cris/linux.opt b/gcc/config/cris/linux.opt
index a57c48d..e93bb53 100644
--- a/gcc/config/cris/linux.opt
+++ b/gcc/config/cris/linux.opt
@@ -23,7 +23,7 @@ mlinux
 Target Report RejectNegative Undocumented
 
 mno-gotplt
-Target Report RejectNegative Mask(AVOID_GOTPLT) MaskExists
+Target Report RejectNegative Mask(AVOID_GOTPLT)
 Together with -fpic and -fPIC, do not use GOTPLT references
 
 ; There's a small added setup cost with using GOTPLT references
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 29f1082..965bef6 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -218,7 +218,7 @@ EnumValue
 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 
 mhard-float
-Target RejectNegative Mask(80387) MaskExists Save
+Target RejectNegative Mask(80387) Save
 Use hardware fp
 
 mieee-fp
@@ -469,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 
 msse4
-Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save
+Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 
 mno-sse4
-Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save
+Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
 
 msse5
diff --git a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt
index 14428fc..00bc2d5 100644
--- a/gcc/config/m68k/m68k.opt
+++ b/gcc/config/m68k/m68k.opt
@@ -136,7 +136,7 @@ Target RejectNegative
 Generate code for a Fido A
 
 mhard-float
-Target RejectNegative Mask(HARD_FLOAT) MaskExists
+Target RejectNegative Mask(HARD_FLOAT)
 Generate code which uses hardware floating point instructions
 
 mid-shared-library
diff --git a/gcc/config/mep/mep.opt b/gcc/config/mep/mep.opt
index 38b8f80..0ea19e6 100644
--- a/gcc/config/mep/mep.opt
+++ b/gcc/config/mep/mep.opt
@@ -55,7 +55,7 @@ Target Mask(COP)
 Enable MeP Coprocessor
 
 mcop32
-Target Mask(COP) MaskExists RejectNegative
+Target Mask(COP) RejectNegative
 Enable MeP Coprocessor with 32-bit registers
 
 mcop64
diff --git a/gcc/config/pa/pa-hpux.opt b/gcc/config/pa/pa-hpux.opt
index ed5d6a4..b709b83 100644
--- a/gcc/config/pa/pa-hpux.opt
+++ b/gcc/config/pa/pa-hpux.opt
@@ -23,7 +23,7 @@ Variable
 int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993
 
 msio
-Target RejectNegative Mask(SIO) MaskExists
+Target RejectNegative Mask(SIO)
 Generate cpp defines for server IO
 
 munix=93
diff --git a/gcc/config/pa/pa64-hpux.opt b/gcc/config/pa/pa64-hpux.opt
index 36b1c61..56ca35e 100644
--- a/gcc/config/pa/pa64-hpux.opt
+++ b/gcc/config/pa/pa64-hpux.opt
@@ -19,7 +19,7 @@
 ; <http://www.gnu.org/licenses/>.
 
 mgnu-ld
-Target RejectNegative Mask(GNU_LD) MaskExists
+Target RejectNegative Mask(GNU_LD)
 Assume code will be linked by GNU ld
 
 mhp-ld
diff --git a/gcc/config/picochip/picochip.opt b/gcc/config/picochip/picochip.opt
index 4726f49..a4b25e5 100644
--- a/gcc/config/picochip/picochip.opt
+++ b/gcc/config/picochip/picochip.opt
@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS)
 Generate warnings when inefficient code is known to be generated.
 
 minefficient
-Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented
+Target Mask(INEFFICIENT_WARNINGS) Undocumented
diff --git a/gcc/config/rs6000/sysv4.opt b/gcc/config/rs6000/sysv4.opt
index 0d8d955..474203d 100644
--- a/gcc/config/rs6000/sysv4.opt
+++ b/gcc/config/rs6000/sysv4.opt
@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN)
 Produce little endian code
 
 mlittle
-Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists
+Target Report RejectNegative Mask(LITTLE_ENDIAN)
 Produce little endian code
 
 mbig-endian
diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
index 7f7af99..3ab2c51b 100644
--- a/gcc/config/sh/sh.opt
+++ b/gcc/config/sh/sh.opt
@@ -316,7 +316,7 @@ Target Report RejectNegative Mask(RELAX)
 Shorten address references during linking
 
 mrenesas
-Target Mask(HITACHI) MaskExists
+Target Mask(HITACHI)
 Follow Renesas (formerly Hitachi) / SuperH calling conventions
 
 msoft-atomic
diff --git a/gcc/config/sparc/long-double-switch.opt b/gcc/config/sparc/long-double-switch.opt
index eb3c1a0..8ad32bd 100644
--- a/gcc/config/sparc/long-double-switch.opt
+++ b/gcc/config/sparc/long-double-switch.opt
@@ -19,7 +19,7 @@
 ; <http://www.gnu.org/licenses/>.
 
 mlong-double-128
-Target Report RejectNegative Mask(LONG_DOUBLE_128) MaskExists
+Target Report RejectNegative Mask(LONG_DOUBLE_128)
 Use 128-bit long double
 
 mlong-double-64
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index 01f3d43..58ba6b7 100644
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -30,7 +30,7 @@ Target Report Mask(FPU)
 Use hardware FP
 
 mhard-float
-Target RejectNegative Mask(FPU) MaskExists
+Target RejectNegative Mask(FPU)
 Use hardware FP
 
 msoft-float
diff --git a/gcc/config/v850/v850.opt b/gcc/config/v850/v850.opt
index 12b0937..8fe244b 100644
--- a/gcc/config/v850/v850.opt
+++ b/gcc/config/v850/v850.opt
@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1)
 Compile for the v850e1 processor
 
 mv850es
-Target RejectNegative Mask(V850E1) MaskExists
+Target RejectNegative Mask(V850E1)
 Compile for the v850es variant of the v850e1
 
 mv850e2
diff --git a/gcc/config/vax/vax.opt b/gcc/config/vax/vax.opt
index 82d6dee..83527ad 100644
--- a/gcc/config/vax/vax.opt
+++ b/gcc/config/vax/vax.opt
@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT)
 Generate GFLOAT double precision code
 
 mg-float
-Target RejectNegative Mask(G_FLOAT) MaskExists
+Target RejectNegative Mask(G_FLOAT)
 Generate GFLOAT double precision code
 
 mgnu