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| author | Andrew Pinski <apinski@cavium.com> | 2013-01-04 22:30:37 +0000 |
|---|---|---|
| committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2013-01-04 14:30:37 -0800 |
| commit | 70f0918881ba6bb31047544723c2a4ed11b2eed5 (patch) | |
| tree | 4ed190a41460510f0447456de3c97d37db56b4dd /gcc | |
| parent | 429cb99447a8111be5bffba67270837e90b77929 (diff) | |
| download | gcc-70f0918881ba6bb31047544723c2a4ed11b2eed5.zip gcc-70f0918881ba6bb31047544723c2a4ed11b2eed5.tar.gz gcc-70f0918881ba6bb31047544723c2a4ed11b2eed5.tar.bz2 | |
aarch64.c (aarch64_fixed_condition_code_regs): New function.
2013-01-04 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
New function.
(TARGET_FIXED_CONDITION_CODE_REGS): Define.
2013-01-04 Andrew Pinski <apinski@cavium.com>
* gcc.target/aarch64/cmp-1.c: New testcase.
From-SVN: r194920
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/cmp-1.c | 15 |
4 files changed, 38 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index be15aa3..c972d9c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-01-04 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs): + New function. + (TARGET_FIXED_CONDITION_CODE_REGS): Define. + 2013-01-04 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.c (ix86_legitimize_address): Call convert_to_mode diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 03b1361..6bba8cc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -3041,6 +3041,16 @@ aarch64_const_double_zero_rtx_p (rtx x) return REAL_VALUES_EQUAL (r, dconst0); } +/* Return the fixed registers used for condition codes. */ + +static bool +aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2) +{ + *p1 = CC_REGNUM; + *p2 = INVALID_REGNUM; + return true; +} + enum machine_mode aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) { @@ -7551,6 +7561,9 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, #define TARGET_VECTORIZE_VEC_PERM_CONST_OK \ aarch64_vectorize_vec_perm_const_ok + +#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-aarch64.h" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9835a26..388d1ce 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2013-01-04 Andrew Pinski <apinski@cavium.com> + + * gcc.target/aarch64/cmp-1.c: New testcase. + 2013-01-04 Paul Thomas <pault@gcc.gnu.org> PR fortran/55172 diff --git a/gcc/testsuite/gcc.target/aarch64/cmp-1.c b/gcc/testsuite/gcc.target/aarch64/cmp-1.c new file mode 100644 index 0000000..4c082b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/cmp-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int f(int a, int b) +{ + if(a<b) + return 1; + if(a>b) + return -1; + return 0; +} + +/* We should optimize away the second cmp. */ +/* { dg-final { scan-assembler-times "cmp\tw" 1 } } */ + |