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authorMatthew Fortune <matthew.fortune@imgtec.com>2016-05-16 14:20:47 +0000
committerRobert Suchanek <rts@gcc.gnu.org>2016-05-16 14:20:47 +0000
commit7065002128b529d194a358266546d5561060405a (patch)
tree37a58c3e6fcf2bb41696783e98974e171be097ee /gcc
parentb434610704af7d25c66e2c6f5dd8c8ab46aa6df2 (diff)
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Correct the latency of loads in M5100
gcc/ * config/mips/m5100.md (m51_int_load): Update the latency to 2. From-SVN: r236288
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/mips/m5100.md2
2 files changed, 5 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4ecd3e7..02f38cf 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-05-16 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/mips/m5100.md (m51_int_load): Update the latency to 2.
+
2016-05-16 Nathan Sidwell <nathan@acm.org>
* config/nvptx/nvptx.c (nvptx_mangle_decl_assembler_name): Revert.
diff --git a/gcc/config/mips/m5100.md b/gcc/config/mips/m5100.md
index f69fc7f..8d87b70 100644
--- a/gcc/config/mips/m5100.md
+++ b/gcc/config/mips/m5100.md
@@ -65,7 +65,7 @@
;; loads: lb, lbu, lh, lhu, ll, lw, lwl, lwr, lwpc, lwxs
;; prefetch: prefetch, prefetchx
-(define_insn_reservation "m51_int_load" 3
+(define_insn_reservation "m51_int_load" 2
(and (eq_attr "cpu" "m5100")
(eq_attr "type" "load,prefetch,prefetchx"))
"m51_alu")