diff options
| author | Richard Earnshaw <rearnsha@arm.com> | 2012-08-04 14:02:56 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2012-08-04 14:02:56 +0000 |
| commit | 6f34864a43e8ce45fedaffc62ce2432bb100eb10 (patch) | |
| tree | 4287fdb54042b6ff9e7719fb8cd5fba85de2e1d4 /gcc | |
| parent | 75235f0597d6ad6dc53ce7a763e5fe7c8534e41a (diff) | |
| download | gcc-6f34864a43e8ce45fedaffc62ce2432bb100eb10.zip gcc-6f34864a43e8ce45fedaffc62ce2432bb100eb10.tar.gz gcc-6f34864a43e8ce45fedaffc62ce2432bb100eb10.tar.bz2 | |
arm.c (arm_gen_constant): Use SImode when preparing operands for gen_extzv_t2.
* arm.c (arm_gen_constant): Use SImode when preparing operands for
gen_extzv_t2.
From-SVN: r190143
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c8985ae..c849368 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-08-04 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (arm_gen_constant): Use SImode when preparing operands for + gen_extzv_t2. + 2012-08-04 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.h (QI_REGNO_P): New define. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 00ccb92..b799e0d 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2999,8 +2999,8 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, /* Extz only supports SImode, but we can coerce the operands into that mode. */ emit_constant_insn (cond, - gen_extzv_t2 (gen_lowpart (mode, target), - gen_lowpart (mode, source), + gen_extzv_t2 (gen_lowpart (SImode, target), + gen_lowpart (SImode, source), GEN_INT (i), const0_rtx)); } |