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| author | Xuepeng Guo <xuepeng.guo@intel.com> | 2018-11-05 09:51:09 +0000 |
|---|---|---|
| committer | Xuepeng Guo <xguo@gcc.gnu.org> | 2018-11-05 09:51:09 +0000 |
| commit | 6db6445e1b3f57e61db66dfe5b6b19013f4f5f49 (patch) | |
| tree | cf68c9869522a6b03ae39baf53a11db95ee7c70a /gcc | |
| parent | 692e7e54e095f281b9d6663434dd11d6caaa3d9b (diff) | |
| download | gcc-6db6445e1b3f57e61db66dfe5b6b19013f4f5f49.zip gcc-6db6445e1b3f57e61db66dfe5b6b19013f4f5f49.tar.gz gcc-6db6445e1b3f57e61db66dfe5b6b19013f4f5f49.tar.bz2 | |
re PR target/87853 (_mm_cmpgt_epi8 broken with -funsigned-char)
2018-11-05 Xuepeng Guo <xuepeng.guo@intel.com>
PR target/87853
* config/i386/emmintrin.h (__v16qs): New to cope with option
-funsigned-char.
(_mm_cmpeq_epi8): Replace __v16qi with __v16qs.
(_mm_cmplt_epi8): Likewise.
(_mm_cmpgt_epi8): Likewise.
From-SVN: r265792
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/emmintrin.h | 7 |
2 files changed, 13 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b3a2567..f1a9d11 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2018-11-05 Xuepeng Guo <xuepeng.guo@intel.com> + + PR target/87853 + * config/i386/emmintrin.h (__v16qs): New to cope with option + -funsigned-char. + (_mm_cmpeq_epi8): Replace __v16qi with __v16qs. + (_mm_cmplt_epi8): Likewise. + (_mm_cmpgt_epi8): Likewise. + 2018-11-05 Richard Biener <rguenther@suse.de> PR rtl-optimization/87852 diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index 7a6ff80..3c1f04b 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -45,6 +45,7 @@ typedef unsigned int __v4su __attribute__ ((__vector_size__ (16))); typedef short __v8hi __attribute__ ((__vector_size__ (16))); typedef unsigned short __v8hu __attribute__ ((__vector_size__ (16))); typedef char __v16qi __attribute__ ((__vector_size__ (16))); +typedef signed char __v16qs __attribute__ ((__vector_size__ (16))); typedef unsigned char __v16qu __attribute__ ((__vector_size__ (16))); /* The Intel API is flexible enough that we must allow aliasing with other @@ -1295,7 +1296,7 @@ _mm_xor_si128 (__m128i __A, __m128i __B) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpeq_epi8 (__m128i __A, __m128i __B) { - return (__m128i) ((__v16qi)__A == (__v16qi)__B); + return (__m128i) ((__v16qs)__A == (__v16qs)__B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -1313,7 +1314,7 @@ _mm_cmpeq_epi32 (__m128i __A, __m128i __B) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmplt_epi8 (__m128i __A, __m128i __B) { - return (__m128i) ((__v16qi)__A < (__v16qi)__B); + return (__m128i) ((__v16qs)__A < (__v16qs)__B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -1331,7 +1332,7 @@ _mm_cmplt_epi32 (__m128i __A, __m128i __B) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi8 (__m128i __A, __m128i __B) { - return (__m128i) ((__v16qi)__A > (__v16qi)__B); + return (__m128i) ((__v16qs)__A > (__v16qs)__B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) |