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authorBill Schmidt <wschmidt@vnet.ibm.com>2014-08-20 16:59:45 +0000
committerWilliam Schmidt <wschmidt@gcc.gnu.org>2014-08-20 16:59:45 +0000
commit6800aaee5f2f325aae2178a30d1dd0c59df8d113 (patch)
tree27cbc4f7a5113d6b68cc77ceaee4bfd2c4db8cef /gcc
parentb7a95a1acfbc0f69c4d09406a3b039ab5867a420 (diff)
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rs6000-c.c (rs6000_cpu_cpp_builtins): Provide builtin define __VEC_ELEMENT_REG_ORDER__.
2014-08-20 Bill Schmidt <wschmidt@vnet.ibm.com> * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Provide builtin define __VEC_ELEMENT_REG_ORDER__. From-SVN: r214236
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/rs6000/rs6000-c.c6
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8f9b113..7742b84 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-08-20 Bill Schmidt <wschmidt@vnet.ibm.com>
+
+ * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Provide
+ builtin define __VEC_ELEMENT_REG_ORDER__.
+
2014-08-20 Martin Jambor <mjambor@suse.cz>
Wei Mi <wmi@google.com>
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 2b9cf7a..40a17e2 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -497,6 +497,12 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
break;
}
+ /* Vector element order. */
+ if (BYTES_BIG_ENDIAN || (rs6000_altivec_element_order == 2))
+ builtin_define ("__VEC_ELEMENT_REG_ORDER__=__ORDER_BIG_ENDIAN__");
+ else
+ builtin_define ("__VEC_ELEMENT_REG_ORDER__=__ORDER_LITTLE_ENDIAN__");
+
/* Let the compiled code know if 'f' class registers will not be available. */
if (TARGET_SOFT_FLOAT || !TARGET_FPRS)
builtin_define ("__NO_FPRS__");