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| author | Uros Bizjak <ubizjak@gmail.com> | 2018-01-26 16:36:32 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-01-26 16:36:32 +0100 |
| commit | 66d617d083aa4fe61a5206d1fc5356b47f33d114 (patch) | |
| tree | 0000692af7d51ed4160a6a3e4eab635ad256bf77 /gcc | |
| parent | f5ef2a143cc5ab8e8d8e25e2e74228d160bacb55 (diff) | |
| download | gcc-66d617d083aa4fe61a5206d1fc5356b47f33d114.zip gcc-66d617d083aa4fe61a5206d1fc5356b47f33d114.tar.gz gcc-66d617d083aa4fe61a5206d1fc5356b47f33d114.tar.bz2 | |
re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+)
PR target/81763
* config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
From-SVN: r257096
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f64269..c23cb36 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-01-26 Uros Bizjak <ubizjak@gmail.com> + + PR target/81763 + * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber + to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives. + 2018-01-26 Richard Biener <rguenther@suse.de> PR rtl-optimization/84003 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5cd3ec0..fe9649d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -9250,14 +9250,14 @@ }) (define_insn "*andndi3_doubleword" - [(set (match_operand:DI 0 "register_operand" "=r,&r") + [(set (match_operand:DI 0 "register_operand" "=&r,r,r,&r") (and:DI - (not:DI (match_operand:DI 1 "register_operand" "r,0")) - (match_operand:DI 2 "nonimmediate_operand" "rm,rm"))) + (not:DI (match_operand:DI 1 "register_operand" "r,0,r,0")) + (match_operand:DI 2 "nonimmediate_operand" "rm,rm,0,rm"))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_STV && TARGET_SSE2" "#" - [(set_attr "isa" "bmi,*")]) + [(set_attr "isa" "bmi,bmi,bmi,*")]) (define_split [(set (match_operand:DI 0 "register_operand") |