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| author | Richard Kenner <kenner@gcc.gnu.org> | 1993-11-12 10:24:51 -0500 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1993-11-12 10:24:51 -0500 |
| commit | 66b804be219715e7855a4e4f4091fa2d3cb588ef (patch) | |
| tree | 52959e2b3d80d771f2d9ecb98bca1065535941fd /gcc | |
| parent | 0e84b55633a9e926ca9d572057943cc9c3a70761 (diff) | |
| download | gcc-66b804be219715e7855a4e4f4091fa2d3cb588ef.zip gcc-66b804be219715e7855a4e4f4091fa2d3cb588ef.tar.gz gcc-66b804be219715e7855a4e4f4091fa2d3cb588ef.tar.bz2 | |
(comparison): Don't emit invalid optimization for (set (reg) (comparison)) and...
(comparison): Don't emit invalid optimization
for (set (reg) (comparison)) and (set (reg) (neg (comparison)))
when comparison is LT.
From-SVN: r6075
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/arm.md | 22 |
1 files changed, 4 insertions, 18 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 68d5c15..8b2cd62 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4229,17 +4229,8 @@ (clobber (reg 24))] "" "* - if (GET_CODE (operands[1]) == LT) - { - if (operands[3] == const0_rtx) - return arm_output_asm_insn (\"mov\\t%0, %2, lsr #31\", operands); - if (GET_CODE (operands[3]) == CONST_INT - && !const_ok_for_arm (INTVAL (operands[3]))) - arm_output_asm_insn (\"add\\t%0, %2, #%n3\", operands); - else - arm_output_asm_insn (\"sub\\t%0, %2, %3\", operands); - return arm_output_asm_insn (\"mov\\t%0, %0, lsr #31\", operands); - } + if (GET_CODE (operands[1]) == LT && operands[3] == const0_rtx) + return arm_output_asm_insn (\"mov\\t%0, %2, lsr #31\", operands); if (GET_CODE (operands[1]) == GE && operands[3] == const0_rtx) { arm_output_asm_insn (\"mvn\\t%0, %2\", operands); @@ -4647,13 +4638,8 @@ (clobber (reg 24))] "" "* - if (GET_CODE (operands[3]) == LT) - { - if (operands[3] == const0_rtx) - return arm_output_asm_insn (\"mov\\t%0, %1, asr #31\", operands); - arm_output_asm_insn (\"sub\\t%0, %1, %2\", operands); - return arm_output_asm_insn (\"mov\\t%0, %0, asr #31\", operands); - } + if (GET_CODE (operands[3]) == LT && operands[3] == const0_rtx) + return arm_output_asm_insn (\"mov\\t%0, %1, asr #31\", operands); if (GET_CODE (operands[3]) == NE) { arm_output_asm_insn (\"subs\\t%0, %1, %2\", operands); |