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authorDing-Kai Chen <dkchen@cadence.com>2016-10-18 19:06:33 +0000
committerMax Filippov <jcmvbkbc@gcc.gnu.org>2016-10-18 19:06:33 +0000
commit66192aa1294360c2522e2e30fc45f84a81719419 (patch)
treea2d0d16150c035c44a7b6c0b5c853224f80ee657 /gcc
parent6dddab0845c9056db22ecb86c12564244fa0f911 (diff)
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xtensa: add HW FPU sequences for DIV/SQRT/RECIP/RSQRT
Use new FPU instruction sequences documented in the ISA book to implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2, __rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt. 2016-10-18 Ding-Kai Chen <dkchen@cadence.com> libgcc/ * config/xtensa/ieee754-df.S (__recipdf2, __rsqrtdf2, __ieee754_sqrt): New functions. (__divdf3): Add implementation with new FPU instructions under #if XCHAL_HAVE_DFP_DIV. * config/xtensa/ieee754-sf.S (__recipsf2, __rsqrtsf2, __ieee754_sqrtf): New functions. (__divsf3): Add implementation with new FPU instructions under #if XCHAL_HAVE_FP_DIV. * config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _sqrtf, _recipsf2 _rsqrtsf2, _sqrt, _recipdf2 and _rsqrtdf2. From-SVN: r241312
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