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| author | Aldy Hernandez <aldyh@gcc.gnu.org> | 2002-11-25 19:40:28 +0000 |
|---|---|---|
| committer | Aldy Hernandez <aldyh@gcc.gnu.org> | 2002-11-25 19:40:28 +0000 |
| commit | 5ddd137f23da93387b733832378cc362aa75aa7d (patch) | |
| tree | 12cb4cb390dff539e2efca5e43cf32bd0f802799 /gcc | |
| parent | fe29a4ea4b61218e645e22352080218b481c6cd2 (diff) | |
| download | gcc-5ddd137f23da93387b733832378cc362aa75aa7d.zip gcc-5ddd137f23da93387b733832378cc362aa75aa7d.tar.gz gcc-5ddd137f23da93387b733832378cc362aa75aa7d.tar.bz2 | |
* config/rs6000/spe.md: Same for patterns.
From-SVN: r59469
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/spe.md | 86 |
1 files changed, 0 insertions, 86 deletions
diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index c5132d7..e876e83 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -1540,47 +1540,6 @@ [(set_attr "type" "veccomplex") (set_attr "length" "4")]) -(define_insn "spe_evmwlsmfaaw" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r") - (reg:V2SI SPE_ACC_REGNO)] 631)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlsmfaaw %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlsmfanw" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r") - (reg:V2SI SPE_ACC_REGNO)] 632)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlsmfanw %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlsmfa" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r")] 633)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlsmfa %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlsmf" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r")] 634))] - "TARGET_SPE" - "evmwlsmf %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - (define_insn "spe_evmwlsmiaaw" [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") @@ -1603,51 +1562,6 @@ [(set_attr "type" "veccomplex") (set_attr "length" "4")]) -(define_insn "spe_evmwlssf" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r")] 637)) - (clobber (reg:SI SPEFSCR_REGNO))] - "TARGET_SPE" - "evmwlssf %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlssfa" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r")] 638)) - (clobber (reg:SI SPEFSCR_REGNO)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlssfa %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlssfaaw" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r") - (reg:V2SI SPE_ACC_REGNO)] 639)) - (clobber (reg:SI SPEFSCR_REGNO)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlssfaaw %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - -(define_insn "spe_evmwlssfanw" - [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") - (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") - (match_operand:V2SI 2 "gpc_reg_operand" "r") - (reg:V2SI SPE_ACC_REGNO)] 640)) - (clobber (reg:SI SPEFSCR_REGNO)) - (clobber (reg:V2SI SPE_ACC_REGNO))] - "TARGET_SPE" - "evmwlssfanw %0,%1,%2" - [(set_attr "type" "veccomplex") - (set_attr "length" "4")]) - (define_insn "spe_evmwlssiaaw" [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r") (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r") |