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author | Segher Boessenkool <segher@kernel.crashing.org> | 2016-07-07 05:09:03 +0200 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2016-07-07 05:09:03 +0200 |
commit | 5ddaee94e247a189a8a17af7dce8d45e0c30adee (patch) | |
tree | 2de57a6ecd444e6768a4028bf841dbcf613dfea2 /gcc | |
parent | 242fab3667f3c694204509a2d4c586954a858b93 (diff) | |
download | gcc-5ddaee94e247a189a8a17af7dce8d45e0c30adee.zip gcc-5ddaee94e247a189a8a17af7dce8d45e0c30adee.tar.gz gcc-5ddaee94e247a189a8a17af7dce8d45e0c30adee.tar.bz2 |
rs6000: Make the ctr* patterns allow ints in vector regs (PR71763)
Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers. So, this patch solves it
in the same way. This only works for targets with direct move.
To recap: register allocation can decide to put an integer mode value in
a floating point or vector register. If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE. Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.
PR target/70098
PR target/71763
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
constraint.
gcc/testsuite/
PR target/70098
PR target/71763
* gcc.target/powerpc/pr71763.c: New file.
From-SVN: r238076
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr71763.c | 27 |
4 files changed, 45 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 48edbc5..cbb4dcf4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-07-06 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/70098 + PR target/71763 + * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2, + *ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output + constraint. + 2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * var-tracking.c (struct adjust_mem_data): Make side_effects a vector. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 46f7382..7d9c660 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -12202,7 +12202,7 @@ (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12226,7 +12226,7 @@ (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12252,7 +12252,7 @@ (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12276,7 +12276,7 @@ (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fa5f1c1..ad8cf4a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2016-07-06 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/70098 + PR target/71763 + * gcc.target/powerpc/pr71763.c: New file. + 2016-07-06 Yuri Rumyantsev <ysrumyan@gmail.com> PR tree-optimization/71518 diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c new file mode 100644 index 0000000..7910a90 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c @@ -0,0 +1,27 @@ +// PR target/71763 +// { dg-do compile } +// { dg-options "-O1 -mvsx" } +// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } } +// { dg-prune-output ".*internal compiler error.*" } + +int a, b; +float c; + +void fn2(void); + +void fn1(void) +{ + long d; + + for (d = 3; d; d--) { + for (a = 0; a <= 1; a++) { + b &= 1; + if (b) { + for (;;) { + fn2(); + c = d; + } + } + } + } +} |