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author | Haochen Gui <guihaoc@gcc.gnu.org> | 2023-10-09 14:33:23 +0800 |
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committer | Haochen Gui <guihaoc@gcc.gnu.org> | 2023-10-09 14:37:33 +0800 |
commit | 5cbe235de6d5c2a04a3116c6b6e63a0e4b8da304 (patch) | |
tree | 321ddcde669c9cea661603c508f064169ee82399 /gcc | |
parent | 6f2899208dda178d9954f11cd2ca4fef0c93b4dd (diff) | |
download | gcc-5cbe235de6d5c2a04a3116c6b6e63a0e4b8da304.zip gcc-5cbe235de6d5c2a04a3116c6b6e63a0e4b8da304.tar.gz gcc-5cbe235de6d5c2a04a3116c6b6e63a0e4b8da304.tar.bz2 |
rs6000: enable SImode in FP register on P7
gcc/
PR target/88558
* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
Enable SImode on FP registers for P7.
* config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
move between FP registers. Set attribute isa of stfiwx to "*"
and attribute of stxsiwx to "p7".
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/rs6000/rs6000.cc | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 15 |
2 files changed, 9 insertions, 8 deletions
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index d10d22a..2828f01 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -1904,7 +1904,7 @@ rs6000_hard_regno_mode_ok_uncached (int regno, machine_mode mode) if(GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD) return 1; - if (TARGET_P8_VECTOR && (mode == SImode)) + if (TARGET_POPCNTD && mode == SImode) return 1; if (TARGET_P9_VECTOR && (mode == QImode || mode == HImode)) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 96084c1..fa433ef 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7629,7 +7629,7 @@ (define_insn "*movsi_internal1" [(set (match_operand:SI 0 "nonimmediate_operand" - "=r, r, + "=r, r, d, r, d, v, m, ?Z, ?Z, r, r, r, r, @@ -7638,7 +7638,7 @@ wa, r, r, *h, *h") (match_operand:SI 1 "input_operand" - "r, U, + "r, U, d, m, ?Z, ?Z, r, d, v, I, L, eI, n, @@ -7651,6 +7651,7 @@ "@ mr %0,%1 la %0,%a1 + fmr %0,%1 lwz%U1%X1 %0,%1 lfiwzx %0,%y1 lxsiwzx %x0,%y1 @@ -7674,7 +7675,7 @@ mt%0 %1 nop" [(set_attr "type" - "*, *, + "*, *, fpsimple, load, fpload, fpload, store, fpstore, fpstore, *, *, *, *, @@ -7683,7 +7684,7 @@ mtvsr, mfvsr, *, *, *") (set_attr "length" - "*, *, + "*, *, *, *, *, *, *, *, *, *, *, *, 8, @@ -7692,9 +7693,9 @@ *, *, *, *, *") (set_attr "isa" - "*, *, - *, p8v, p8v, - *, p8v, p8v, + "*, *, *, + *, p7, p8v, + *, *, p8v, *, *, p10, *, p8v, p9v, p9v, p8v, p9v, p8v, p9v, |