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| author | Jakub Jelinek <jakub@redhat.com> | 2019-07-31 15:49:26 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2019-07-31 15:49:26 +0200 |
| commit | 538e4cdc15fdfc06f2a54f1a92bc996ec99cb528 (patch) | |
| tree | 7ac6f6e3c660337050cfaa873152089b9c8662b5 /gcc | |
| parent | 930c55993f514c51aca0374650029d99056412a3 (diff) | |
| download | gcc-538e4cdc15fdfc06f2a54f1a92bc996ec99cb528.zip gcc-538e4cdc15fdfc06f2a54f1a92bc996ec99cb528.tar.gz gcc-538e4cdc15fdfc06f2a54f1a92bc996ec99cb528.tar.bz2 | |
re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR tree-optimization/91201
* config/i386/mmx.md (reduc_plus_scal_v8qi): New expander.
* gcc.target/i386/sse2-pr91201-2.c: New test.
From-SVN: r273932
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/mmx.md | 15 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c | 21 |
4 files changed, 46 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5bfe7bc..a883b23 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-07-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91201 + * config/i386/mmx.md (reduc_plus_scal_v8qi): New expander. + 2019-07-31 Andrew Stubbs <ams@codesourcery.com> * config/gcn/gcn-valu.md diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index c78b33b..b4738ae 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1897,6 +1897,21 @@ (set_attr "type" "mmxshft,sseiadd,sseiadd") (set_attr "mode" "DI,TI,TI")]) +(define_expand "reduc_plus_scal_v8qi" + [(plus:V8QI + (match_operand:QI 0 "register_operand") + (match_operand:V8QI 1 "register_operand"))] + "TARGET_MMX_WITH_SSE" +{ + rtx tmp = gen_reg_rtx (V8QImode); + emit_move_insn (tmp, CONST0_RTX (V8QImode)); + rtx tmp2 = gen_reg_rtx (V1DImode); + emit_insn (gen_mmx_psadbw (tmp2, operands[1], tmp)); + tmp2 = gen_lowpart (V8QImode, tmp2); + emit_insn (gen_vec_extractv8qiqi (operands[0], tmp2, const0_rtx)); + DONE; +}) + (define_insn_and_split "mmx_pmovmskb" [(set (match_operand:SI 0 "register_operand" "=r,r") (unspec:SI [(match_operand:V8QI 1 "register_operand" "y,x")] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 44166d1..91378f2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-07-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/91201 + * gcc.target/i386/sse2-pr91201-2.c: New test. + 2019-07-31 Richard Biener <rguenther@suse.de> PR tree-optimization/91178 diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c b/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c new file mode 100644 index 0000000..d711ee0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pr91201-2.c @@ -0,0 +1,21 @@ +/* PR tree-optimization/91201 */ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O3 -msse2 -mno-sse3" } */ +/* { dg-final { scan-assembler "\tpsadbw\t" } } */ + +unsigned char bytes[1024]; + +unsigned char +sum (void) +{ + unsigned char r = 0; + unsigned char *p = (unsigned char *) bytes; + int n; + + for (n = 8; n < sizeof (bytes); ++n) + { + p[n - 8] += p[n]; + r += p[n]; + } + return r; +} |