* config/ia64/ia64.md (*nmaddsf4, *nmadddf4, *nmadddf4_alts)

	(*nmadddf4_trunc, *nmaddxf4, *nmaddxf4_truncsf, *nmaddxf4_truncdf)
	(*nmaddxf4_alts, *nmaddxf4_truncdf_alts):
	Rewrite pattern as (minus (op 3) (mult (op 1) (op 2))).
	Possibly rename pattern for consistency.
	Remove ??? comments suggesting that this be done.
	(*nmaddsf4_alts, *nmadddf4_truncsf_alts, *nmaddxf4_truncsf_alts):
	New patterns.
	(divsi3_internal, divdi3_internal_lat, divdi3_internal_thr)
	(divsf3_internal_lat, divsf3_internal_thr, sqrtsf2_internal_thr)
	(divdf3_internal_lat, divdf3_internal_thr, sqrtdf2_internal_thr)
	(divxf3_internal_lat, divxf3_internal_thr, sqrtxf2_internal_thr):
	Update to match.

From-SVN: r76734

2 files changed, 166 insertions, 127 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 119c20a..5a6c57b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2004-01-27  Zack Weinberg  <zack@codesourcery.com>
+
+	PR 7198
+	* config/ia64/ia64.md (*nmaddsf4, *nmadddf4, *nmadddf4_alts)
+	(*nmadddf4_trunc, *nmaddxf4, *nmaddxf4_truncsf, *nmaddxf4_truncdf)
+	(*nmaddxf4_alts, *nmaddxf4_truncdf_alts):
+	Rewrite pattern as (minus (op 3) (mult (op 1) (op 2))).
+	Possibly rename pattern for consistency.
+	Remove ??? comments suggesting that this be done.
+	(*nmaddsf4_alts, *nmadddf4_truncsf_alts, *nmaddxf4_truncsf_alts):
+	New patterns.
+	(divsi3_internal, divdi3_internal_lat, divdi3_internal_thr)
+	(divsf3_internal_lat, divsf3_internal_thr, sqrtsf2_internal_thr)
+	(divdf3_internal_lat, divdf3_internal_thr, sqrtdf2_internal_thr)
+	(divxf3_internal_lat, divxf3_internal_thr, sqrtxf2_internal_thr):
+	Update to match.
+
 2004-01-27  Ian Lance Taylor  <ian@wasabisystems.com>
 
 	* config/arm/arm.c (output_return_instruction): Only restore IP
@@ -39,7 +56,7 @@
 	* common.opt: Add entry for -fbtr-bb-exclusive.
 	* opts.c (common_handle_options): Same.
 	* doc/invoke.texi: Document -fbtr-bb-exclusive.
-   
+
 	* bt-load.c (btrs_live_at_end): New variable.
 	(compute_defs_uses_and_gen): Compute its pointed-to array.
 	(clear_btr_from_live_range, add_btr_to_live_range): Update it.
@@ -50,7 +67,7 @@
 	(move_btr_def): Set other_btr_uses_before_def, and move new set
 	to the end of the basic block, if appropriate.
 	(migrate_btr_defs): Allocate and free btrs_live_at_end.
-   
+
 	* bt-load.c (basic_block_freq): Remove outdated comment.
 
 2004-01-27  Alan Modra  <amodra@bigpond.net.au>
@@ -126,20 +143,20 @@
 
 2004-01-26  Fariborz Jahanian <fjahanian@apple.com>
 
-         * config/rs6000/rs6000.c (rs6000_emit_move): split slow
-         unaligned load/store into smaller loads and stores.
+	 * config/rs6000/rs6000.c (rs6000_emit_move): split slow
+	 unaligned load/store into smaller loads and stores.
 
 2004-01-26  Fariborz Jahanian <fjahanian@apple.com>
 
-        * function.c (assign_parms): Do not assign
-        long long argument to memory in prologue if
-        is it loaded into register.
+	* function.c (assign_parms): Do not assign
+	long long argument to memory in prologue if
+	is it loaded into register.
 
 2004-01-26  Fariborz Jahanian <fjahanian@apple.com>
 
 	 PR middle-end/13779
-         * expr.c (emit_group_load): split constant
-         correctly into register components of PARALLEL insn.
+	 * expr.c (emit_group_load): split constant
+	 correctly into register components of PARALLEL insn.
 
 2004-01-26  Fariborz Jahanian <fjahanian@apple.com>
 
@@ -241,7 +258,7 @@
 
 	* config/c4x/c4x.h (BCT_CHECK_LOOP_ITERATIONS): Remove.
 	(HAVE_GAS_HIDDEN): Undefine as interim measure.
-	
+
 2004-01-26  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
 	* config/c4x/c4x.c (c4x_legitimate_address_p):  Invalidate direct
@@ -250,7 +267,7 @@
 2004-01-26  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
 	* config/c4x/c4x.c (legitimize_operands): Truncate invalid shift counts.
-	
+
 2004-01-26  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
 	* config/c4x/c4x.c (c4x_valid_operands): More aggressively reject
@@ -263,7 +280,7 @@
 
 	* config/c4x/c4x-protos.h (c4x_check_legit_addr): Adjust.
 	* config/c4x/c4x.h (c4x_check_legit_addr): Adjust.
-	
+
 2004-01-25  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/pa/pa-protos.h: Remove the prototype for
@@ -293,9 +310,9 @@
 	(PROMOTE_PROTOTYPES): Remove.
 
 2004-01-26  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
-	
-        * config/c4x/c4x.h (LEGITIMIZE_RELOAD_ADDRESS):  Handle symref.
- 
+
+	* config/c4x/c4x.h (LEGITIMIZE_RELOAD_ADDRESS):  Handle symref.
+
 2003-04-25  Chris Demetriou  <cgd@broadcom.com>
 
 	* config/mips/mips.h (ISA_HAS_HILO_INTERLOCKS): MIPS32, MIPS32r2,
@@ -580,10 +597,10 @@
 
 2004-01-23  Richard Henderson  <rth@redhat.com>
 
-        PR opt/12941
-        * combine.c (SHIFT_COUNT_TRUNCATED): Provide default value.
-        (simplify_comparison): Don't simplify (eq (zero_extract c 1 r) 0)
-        if SHIFT_COUNT_TRUNCATED is set.
+	PR opt/12941
+	* combine.c (SHIFT_COUNT_TRUNCATED): Provide default value.
+	(simplify_comparison): Don't simplify (eq (zero_extract c 1 r) 0)
+	if SHIFT_COUNT_TRUNCATED is set.
 
 2004-01-23  Bob Wilson  <bob.wilson@acm.org>
 
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 169569a..635100c 100644
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -2009,8 +2009,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 5)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 7)))
+		     (minus:XF (match_dup 7)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 4)
@@ -2409,8 +2409,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 7)))
+		     (minus:XF (match_dup 7)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 4) (mult:XF (match_dup 1) (match_dup 0)))
@@ -2440,8 +2440,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 3)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -2468,8 +2468,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 6)))
+		     (minus:XF (match_dup 6)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -2489,8 +2489,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 3)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -2594,18 +2594,25 @@
   "fnmpy.s %0 = %1, %2"
   [(set_attr "itanium_class" "fmac")])
 
-;; ??? Is it possible to canonicalize this as (minus (reg) (mult))?
-
 (define_insn "*nmaddsf4"
   [(set (match_operand:SF 0 "fr_register_operand" "=f")
-	(plus:SF (neg:SF (mult:SF
-			   (match_operand:SF 1 "fr_register_operand" "f")
-			   (match_operand:SF 2 "fr_register_operand" "f")))
-		 (match_operand:SF 3 "fr_reg_or_fp01_operand" "fG")))]
+	(minus:SF (match_operand:SF 3 "fr_reg_or_fp01_operand" "fG") 
+		  (mult:SF (match_operand:SF 1 "fr_register_operand" "f")
+			   (match_operand:SF 2 "fr_register_operand" "f"))))]
   ""
   "fnma.s %0 = %1, %2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
+(define_insn "*nmaddsf4_alts"
+  [(set (match_operand:SF 0 "fr_register_operand" "=f")
+	(minus:SF (match_operand:SF 3 "fr_reg_or_fp01_operand" "fG") 
+		  (mult:SF (match_operand:SF 1 "fr_register_operand" "f")
+			   (match_operand:SF 2 "fr_register_operand" "f"))))
+   (use (match_operand:SI 4 "const_int_operand" ""))]
+  ""
+  "fnma.s.s%4 %0 = %1, %2, %F3"
+  [(set_attr "itanium_class" "fmac")])
+
 (define_expand "divsf3"
   [(set (match_operand:SF 0 "fr_register_operand" "")
 	(div:SF (match_operand:SF 1 "fr_register_operand" "")
@@ -2640,8 +2647,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 6)))
-			      (match_dup 10)))
+		     (minus:XF (match_dup 10)
+			       (mult:XF (match_dup 8) (match_dup 6))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
@@ -2694,8 +2701,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 6)))
-			      (match_dup 10)))
+		     (minus:XF (match_dup 10)
+			       (mult:XF (match_dup 8) (match_dup 6))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
@@ -2714,8 +2721,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 3)))
-			      (match_dup 7)))
+		     (minus:XF (match_dup 7)
+			       (mult:XF (match_dup 8) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (set (match_dup 0)
@@ -2825,8 +2832,8 @@
     ;; d = 1/2 - S0 * H0 in f10
     (cond_exec (ne (match_dup 6) (const_int 0))
       (parallel [(set (match_dup 5)
-                      (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 4)))
-                               (match_dup 3)))
+                      (minus:XF (match_dup 3)
+				(mult:XF (match_dup 7) (match_dup 4))))
                  (use (const_int 1))]))
     ;; Step 5
     ;; d' = d + 1/2 * d in f8
@@ -2861,8 +2868,8 @@
     ;; d1 = a - S1 * S1 in f9
     (cond_exec (ne (match_dup 6) (const_int 0))
        (parallel [(set (match_dup 4)
-                       (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 7)))
-                                (match_dup 8)))
+                       (minus:XF (match_dup 8)
+				 (mult:XF (match_dup 7) (match_dup 7))))
                   (use (const_int 1))]))
     ;; Step 10
     ;; S = S1 + d1 * H1 in f7
@@ -3030,40 +3037,46 @@
   "fnmpy.s %0 = %1, %2"
   [(set_attr "itanium_class" "fmac")])
 
-;; ??? Is it possible to canonicalize this as (minus (reg) (mult))?
-
 (define_insn "*nmadddf4"
   [(set (match_operand:DF 0 "fr_register_operand" "=f")
-	(plus:DF (neg:DF (mult:DF
-			   (match_operand:DF 1 "fr_register_operand" "f")
-			   (match_operand:DF 2 "fr_register_operand" "f")))
-		 (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")))]
+	(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
+		  (mult:DF (match_operand:DF 1 "fr_register_operand" "f")
+			   (match_operand:DF 2 "fr_register_operand" "f"))))]
   ""
   "fnma.d %0 = %1, %2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
 (define_insn "*nmadddf4_alts"
   [(set (match_operand:DF 0 "fr_register_operand" "=f")
-	(plus:DF (neg:DF (mult:DF
-			   (match_operand:DF 1 "fr_register_operand" "f")
-			   (match_operand:DF 2 "fr_register_operand" "f")))
-		 (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")))
+	(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
+		  (mult:DF (match_operand:DF 1 "fr_register_operand" "f")
+			   (match_operand:DF 2 "fr_register_operand" "f"))))
    (use (match_operand:SI 4 "const_int_operand" ""))]
   ""
   "fnma.d.s%4 %0 = %1, %2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
-(define_insn "*nmadddf4_trunc"
+(define_insn "*nmadddf4_truncsf"
   [(set (match_operand:SF 0 "fr_register_operand" "=f")
 	(float_truncate:SF
-	  (plus:DF (neg:DF (mult:DF
-			     (match_operand:DF 1 "fr_register_operand" "f")
-			     (match_operand:DF 2 "fr_register_operand" "f")))
-		   (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG"))))]
+	(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
+		  (mult:DF (match_operand:DF 1 "fr_register_operand" "f")
+			   (match_operand:DF 2 "fr_register_operand" "f")))))]
   ""
   "fnma.s %0 = %1, %2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
+(define_insn "*nmadddf4_truncsf_alts"
+  [(set (match_operand:SF 0 "fr_register_operand" "=f")
+	(float_truncate:SF
+	(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
+		  (mult:DF (match_operand:DF 1 "fr_register_operand" "f")
+			   (match_operand:DF 2 "fr_register_operand" "f")))))
+   (use (match_operand:SI 4 "const_int_operand" ""))]
+  ""
+  "fnma.s.s%4 %0 = %1, %2, %F3"
+  [(set_attr "itanium_class" "fmac")])
+
 (define_expand "divdf3"
   [(set (match_operand:DF 0 "fr_register_operand" "")
 	(div:DF (match_operand:DF 1 "fr_register_operand" "")
@@ -3099,8 +3112,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 9) (match_dup 7)))
-			      (match_dup 12)))
+		     (minus:XF (match_dup 12)
+			       (mult:XF (match_dup 9) (match_dup 7))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 3)
@@ -3142,8 +3155,8 @@
    (cond_exec (ne (match_dup 6) (const_int 0))
      (parallel [(set (match_dup 11)
 		     (float_truncate:DF
-		       (plus:XF (neg:XF (mult:XF (match_dup 9) (match_dup 3)))
-			        (match_dup 8))))
+		       (minus:XF (match_dup 8)
+				 (mult:XF (match_dup 9) (match_dup 3)))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 6) (const_int 0))
      (set (match_dup 0)
@@ -3176,8 +3189,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 6)))
-			      (match_dup 10)))
+		     (minus:XF (match_dup 10)
+			       (mult:XF (match_dup 8) (match_dup 6))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 6)
@@ -3209,8 +3222,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:DF (neg:DF (mult:DF (match_dup 2) (match_dup 9)))
-			      (match_dup 1)))
+		     (minus:DF (match_dup 1)
+			       (mult:DF (match_dup 2) (match_dup 9))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (set (match_dup 0)
@@ -3299,8 +3312,8 @@
     ;; r0 = 1/2 - G0 * H0 in f9
     (cond_exec (ne (match_dup 6) (const_int 0))
       (parallel [(set (match_dup 4)
-                      (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 3)))
-                               (match_dup 5)))
+                      (minus:XF (match_dup 5)
+				(mult:XF (match_dup 7) (match_dup 3))))
                  (use (const_int 1))]))
     ;; Step 5
     ;; H1 = H0 + r0 * H0 in f8
@@ -3320,8 +3333,8 @@
     ;; r1 = 1/2 - G1 * H1 in f9
     (cond_exec (ne (match_dup 6) (const_int 0))
       (parallel [(set (match_dup 4)
-                      (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 3)))
-                               (match_dup 5)))
+                      (minus:XF (match_dup 5)
+				(mult:XF (match_dup 7) (match_dup 3))))
                  (use (const_int 1))]))
     ;; Step 8
     ;; H2 = H1 + r1 * H1 in f8
@@ -3341,8 +3354,8 @@
     ;; d2 = a - G2 * G2 in f9
     (cond_exec (ne (match_dup 6) (const_int 0))
        (parallel [(set (match_dup 4)
-                       (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 7)))
-                                (match_dup 8)))
+                       (minus:XF (match_dup 8)
+				 (mult:XF (match_dup 7) (match_dup 7))))
                   (use (const_int 1))]))
     ;; Step 11
     ;; G3 = G2 + d2 * H2 in f7
@@ -3355,8 +3368,8 @@
     ;; d3 = a - G3 * G3 in f9
     (cond_exec (ne (match_dup 6) (const_int 0))
        (parallel [(set (match_dup 4)
-                       (plus:XF (neg:XF (mult:XF (match_dup 7) (match_dup 7)))
-                                (match_dup 8)))
+                       (minus:XF (match_dup 8)
+				 (mult:XF (match_dup 7) (match_dup 7))))
                   (use (const_int 1))]))
     ;; Step 13
     ;; S = G3 + d3 * H2 in f7
@@ -3643,14 +3656,12 @@
   "fnmpy.d %0 = %F1, %F2"
   [(set_attr "itanium_class" "fmac")])
 
-;; ??? Is it possible to canonicalize this as (minus (reg) (mult))?
-
 (define_insn "*nmaddxf4"
   [(set (match_operand:XF 0 "fr_register_operand" "=f")
-	(plus:XF (neg:XF (mult:XF
-			  (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
-			  (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))
-		 (match_operand:XF 3 "xfreg_or_fp01_operand" "fG")))]
+	(minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG")
+		  (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			   (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   )))]
   ""
   "fnma %0 = %F1, %F2, %F3"
   [(set_attr "itanium_class" "fmac")])
@@ -3658,10 +3669,10 @@
 (define_insn "*nmaddxf4_truncsf"
   [(set (match_operand:SF 0 "fr_register_operand" "=f")
 	(float_truncate:SF
-	  (plus:XF (neg:XF (mult:XF
-			    (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
-			    (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))
-		   (match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
+	  (minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG") 
+		    (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			     (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   ))))]
   ""
   "fnma.s %0 = %F1, %F2, %F3"
   [(set_attr "itanium_class" "fmac")])
@@ -3669,33 +3680,44 @@
 (define_insn "*nmaddxf4_truncdf"
   [(set (match_operand:DF 0 "fr_register_operand" "=f")
 	(float_truncate:DF
-	  (plus:XF (neg:XF (mult:XF
-			    (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
-			    (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))
-		   (match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
+	  (minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG") 
+		    (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			     (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   ))))]
   ""
   "fnma.d %0 = %F1, %F2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
 (define_insn "*nmaddxf4_alts"
   [(set (match_operand:XF 0 "fr_register_operand" "=f")
-	(plus:XF (neg:XF (mult:XF
-			  (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
-			  (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))
-		 (match_operand:XF 3 "xfreg_or_fp01_operand" "fG")))
+	(minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG")
+		  (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			   (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   )))
    (use (match_operand:SI 4 "const_int_operand" ""))]
   ""
   "fnma.s%4 %0 = %F1, %F2, %F3"
   [(set_attr "itanium_class" "fmac")])
 
+(define_insn "*nmaddxf4_truncsf_alts"
+  [(set (match_operand:SF 0 "fr_register_operand" "=f")
+	(float_truncate:SF
+	  (minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG") 
+		    (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			     (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   ))))
+   (use (match_operand:SI 4 "const_int_operand" ""))]
+  ""
+  "fnma.s.s%4 %0 = %F1, %F2, %F3"
+  [(set_attr "itanium_class" "fmac")])
+
 (define_insn "*nmaddxf4_truncdf_alts"
   [(set (match_operand:DF 0 "fr_register_operand" "=f")
 	(float_truncate:DF
-	  (plus:XF (neg:XF
-		     (mult:XF
-		       (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
-		       (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))
-		 (match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))
+	  (minus:XF (match_operand:XF 3 "xfreg_or_fp01_operand" "fG") 
+		    (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
+			     (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
+   ))))
    (use (match_operand:SI 4 "const_int_operand" ""))]
   ""
   "fnma.d.s%4 %0 = %F1, %F2, %F3"
@@ -3734,8 +3756,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 8)))
+		     (minus:XF (match_dup 8)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 4) (mult:XF (match_dup 1) (match_dup 0)))
@@ -3765,8 +3787,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 4)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 4))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 3)
@@ -3775,8 +3797,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 5)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 8)))
+		     (minus:XF (match_dup 8)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -3785,8 +3807,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 3)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 7) (const_int 0))
      (set (match_dup 0)
@@ -3812,8 +3834,8 @@
 	      (use (const_int 1))])
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 6)))
+		     (minus:XF (match_dup 6)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
@@ -3833,8 +3855,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 0)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 3)))
-			      (match_dup 6)))
+		     (minus:XF (match_dup 6)
+			       (mult:XF (match_dup 2) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -3843,8 +3865,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 4)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 4))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 3)
@@ -3853,8 +3875,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 0)))
-			      (match_dup 6)))
+		     (minus:XF (match_dup 6)
+			       (mult:XF (match_dup 2) (match_dup 0))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 0)
@@ -3863,8 +3885,8 @@
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (parallel [(set (match_dup 4)
-		     (plus:XF (neg:XF (mult:XF (match_dup 2) (match_dup 3)))
-			      (match_dup 1)))
+		     (minus:XF (match_dup 1)
+			       (mult:XF (match_dup 2) (match_dup 3))))
 		(use (const_int 1))]))
    (cond_exec (ne (match_dup 5) (const_int 0))
      (set (match_dup 0)
@@ -3949,8 +3971,8 @@
     ;; d0 = 1/2 - S0 * H0 in f10
     (cond_exec (ne (match_dup 7) (const_int 0))
       (parallel [(set (match_dup 5)
-                      (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 4)))
-                               (match_dup 3)))
+                      (minus:XF (match_dup 3)
+				(mult:XF (match_dup 8) (match_dup 4))))
                  (use (const_int 1))]))
     ;; Step 5
     ;; H1 = H0 + d0 * H0 in f9
@@ -3970,8 +3992,8 @@
     ;; d1 = 1/2 - S1 * H1 in f10
     (cond_exec (ne (match_dup 7) (const_int 0))
       (parallel [(set (match_dup 5)
-                      (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 4)))
-                               (match_dup 3)))
+                      (minus:XF (match_dup 3)
+				(mult:XF (match_dup 8) (match_dup 4))))
                  (use (const_int 1))]))
     ;; Step 8
     ;; H2 = H1 + d1 * H1 in f9
@@ -3991,15 +4013,15 @@
     ;; d2 = 1/2 - S2 * H2 in f10
     (cond_exec (ne (match_dup 7) (const_int 0))
        (parallel [(set (match_dup 5)
-                       (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 4)))
-                                (match_dup 3)))
+                       (minus:XF (match_dup 3)
+				 (mult:XF (match_dup 8) (match_dup 4))))
                   (use (const_int 1))]))
     ;; Step 11
     ;; e2 = a - S2 * S2 in f8
     (cond_exec (ne (match_dup 7) (const_int 0))
        (parallel [(set (match_dup 3)
-                       (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 8)))
-                                (match_dup 9)))
+                       (minus:XF (match_dup 9)
+				 (mult:XF (match_dup 8) (match_dup 8))))
                   (use (const_int 1))]))
     ;; Step 12
     ;; S3 = S2 + e2 * H2 in f7
@@ -4019,8 +4041,8 @@
     ;; e3 = a - S3 * S3 in f8
     (cond_exec (ne (match_dup 7) (const_int 0))
        (parallel [(set (match_dup 3)
-                       (plus:XF (neg:XF (mult:XF (match_dup 8) (match_dup 8)))
-                                (match_dup 9)))
+                       (minus:XF (match_dup 9)
+				 (mult:XF (match_dup 8) (match_dup 8))))
                   (use (const_int 1))]))
     ;; Step 15
     ;; S = S3 + e3 * H3 in f7