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| author | Li Xu <xuli1@eswincomputing.com> | 2023-04-04 19:12:26 -0600 |
|---|---|---|
| committer | Jeff Law <jlaw@ventanamicro> | 2023-04-04 19:14:00 -0600 |
| commit | 4f81edad41caea4ddd269555f88790cec28cc9d9 (patch) | |
| tree | cb8a2ea491bfb8e9ce846ee3935870d3af360a6e /gcc | |
| parent | 645b13625163a3f74643e9f6eaabdb8d2e5a1169 (diff) | |
| download | gcc-4f81edad41caea4ddd269555f88790cec28cc9d9.zip gcc-4f81edad41caea4ddd269555f88790cec28cc9d9.tar.gz gcc-4f81edad41caea4ddd269555f88790cec28cc9d9.tar.bz2 | |
RISC-V: Fix typos
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.def: Fix typo.
* config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
* config/riscv/vector-iterators.md: Ditto.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-builtins.def | 3 | ||||
| -rw-r--r-- | gcc/config/riscv/riscv.cc | 4 | ||||
| -rw-r--r-- | gcc/config/riscv/vector-iterators.md | 4 |
3 files changed, 5 insertions, 6 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 2d527f7..563ad35 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -65,8 +65,7 @@ along with GCC; see the file COPYING3. If not see #define DEF_RVV_BASE_TYPE(NAME, TYPE) #endif -/* Use "DEF_RVV_TYPE_INDEX" macro to define RVV function types. - The 'NAME' will be concatenated into intrinsic function name. */ +/* Use "DEF_RVV_TYPE_INDEX" macro to define RVV function types. */ #ifndef DEF_RVV_TYPE_INDEX #define DEF_RVV_TYPE_INDEX(VECTOR, MASK, SIGNED, UNSIGNED, EEW8_INDEX, EEW16_INDEX, \ EEW32_INDEX, EEW64_INDEX, SHIFT, DOUBLE_TRUNC, \ diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 76eee4a..5f54293 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -7048,8 +7048,8 @@ riscv_dwarf_poly_indeterminate_value (unsigned int i, unsigned int *factor, int *offset) { /* Polynomial invariant 1 == (VLENB / riscv_bytes_per_vector_chunk) - 1. - 1. TARGET_MIN_VLEN == 32, olynomial invariant 1 == (VLENB / 4) - 1. - 2. TARGET_MIN_VLEN > 32, olynomial invariant 1 == (VLENB / 8) - 1. + 1. TARGET_MIN_VLEN == 32, polynomial invariant 1 == (VLENB / 4) - 1. + 2. TARGET_MIN_VLEN > 32, polynomial invariant 1 == (VLENB / 8) - 1. */ gcc_assert (i == 1); *factor = riscv_bytes_per_vector_chunk; diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 34e486e..194e9b8 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -727,7 +727,7 @@ (VNx1QI "vnx4hi") (VNx2QI "vnx4hi") (VNx4QI "vnx4hi") (VNx8QI "vnx4hi") (VNx16QI "vnx4hi") (VNx32QI "vnx4hi") (VNx64QI "vnx4hi") (VNx1HI "vnx2si") (VNx2HI "vnx2si") (VNx4HI "vnx2si") - (VNx8HI "vnx2si") (VNx16HI "vnx2si") (VNx32HI "vnx2SI") + (VNx8HI "vnx2si") (VNx16HI "vnx2si") (VNx32HI "vnx2si") (VNx1SI "vnx2di") (VNx2SI "vnx2di") (VNx4SI "vnx2di") (VNx8SI "vnx2di") (VNx16SI "vnx2di") (VNx1SF "vnx1df") (VNx2SF "vnx1df") @@ -738,7 +738,7 @@ (VNx1QI "vnx2hi") (VNx2QI "vnx2hi") (VNx4QI "vnx2hi") (VNx8QI "vnx2hi") (VNx16QI "vnx2hi") (VNx32QI "vnx2hi") (VNx1HI "vnx1si") (VNx2HI "vnx1si") (VNx4HI "vnx1si") - (VNx8HI "vnx1si") (VNx16HI "vnx1SI") + (VNx8HI "vnx1si") (VNx16HI "vnx1si") ]) (define_mode_attr VDEMOTE [ |