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| author | Jeffrey A Law <law@cygnus.com> | 1997-09-18 00:31:51 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1997-09-17 18:31:51 -0600 |
| commit | 4eb66248bf9ba2c160f05da1b684412c17374aff (patch) | |
| tree | 2862b644b1527410e8b68ac6c0077a2caf4470b1 /gcc | |
| parent | f996e5138bb66e15678f1623438eeb9daec9ed4b (diff) | |
| download | gcc-4eb66248bf9ba2c160f05da1b684412c17374aff.zip gcc-4eb66248bf9ba2c160f05da1b684412c17374aff.tar.gz gcc-4eb66248bf9ba2c160f05da1b684412c17374aff.tar.bz2 | |
abi64.h (LONG_MAX_SPEC): Define.
* mips/abi64.h (LONG_MAX_SPEC): Define.
* mips.h (LONG_MAX_SPEC): Define.
(CPP_SPEC): Include long_max_spec.
(EXTRA_SPECS): Include long_max_spec.
Brought over from devo.
From-SVN: r15531
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/abi64.h | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 12 |
3 files changed, 24 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 93996cf2..5331d7d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +Wed Sep 17 18:33:59 1997 Jeffrey A Law (law@cygnus.com) + + * mips/abi64.h (LONG_MAX_SPEC): Define. + * mips.h (LONG_MAX_SPEC): Define. + (CPP_SPEC): Include long_max_spec. + (EXTRA_SPECS): Include long_max_spec. + 1997-09-17 Brendan Kehoe <brendan@lisa.cygnus.com> * configure.in, configure: Make sure to create the stage* and include diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h index 1cf561a..a3e768c 100644 --- a/gcc/config/mips/abi64.h +++ b/gcc/config/mips/abi64.h @@ -213,6 +213,9 @@ extern struct rtx_def *mips_function_value (); (mips_abi == ABI_EABI && (NAMED) \ && FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)) +#undef LONG_MAX_SPEC +#define LONG_MAX_SPEC "%{!mno-long64:-D__LONG_MAX__=9223372036854775807LL}" + /* ??? Unimplemented stuff follows. */ /* ??? Add support for 16 byte/128 bit long doubles here when @@ -227,3 +230,5 @@ extern struct rtx_def *mips_function_value (); into the field decl, so that if we use the field, we can take the value from a register instead of from memory. */ + + diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index fba9d0a..6ea1d77 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -817,6 +817,16 @@ while (0) #define SUBTARGET_CPP_SPEC "" #endif +/* If we're using 64bit longs, then we have to define __LONG_MAX__ + correctly. Similarly for 64bit ints and __INT_MAX__. */ +#ifndef LONG_MAX_SPEC +#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_LONG64) +#define LONG_MAX_SPEC "%{!mno-long64:-D__LONG_MAX__=9223372036854775807L}" +#else +#define LONG_MAX_SPEC "%{mlong64:-D__LONG_MAX__=9223372036854775807L}" +#endif +#endif + /* CPP_SPEC is the set of arguments to pass to the preprocessor. */ #ifndef CPP_SPEC @@ -838,6 +848,7 @@ while (0) %{mabi=eabi:-D__mips_eabi} \ %{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \ %{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}} \ +%(long_max_spec) \ %(subtarget_cpp_spec) " #endif @@ -855,6 +866,7 @@ while (0) { "subtarget_cc1_spec", SUBTARGET_CC1_SPEC }, \ { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \ { "subtarget_cpp_size_spec", SUBTARGET_CPP_SIZE_SPEC }, \ + { "long_max_spec", LONG_MAX_SPEC }, \ { "mips_as_asm_spec", MIPS_AS_ASM_SPEC }, \ { "gas_asm_spec", GAS_ASM_SPEC }, \ { "target_asm_spec", TARGET_ASM_SPEC }, \ |