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| author | Andrew Pinski <apinski@cavium.com> | 2016-10-06 22:49:58 +0000 |
|---|---|---|
| committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2016-10-06 15:49:58 -0700 |
| commit | 4d9205d5257f164f2a2c2a168e636862012dfff6 (patch) | |
| tree | 8e9adf3f8f9c8c97b19ad8f7c5c12ff3d43fdb8c /gcc | |
| parent | b7558a2c1f87e374c48fa2be8e3ab93e1b3c68b0 (diff) | |
| download | gcc-4d9205d5257f164f2a2c2a168e636862012dfff6.zip gcc-4d9205d5257f164f2a2c2a168e636862012dfff6.tar.gz gcc-4d9205d5257f164f2a2c2a168e636862012dfff6.tar.bz2 | |
aarch64-cores.def: Add a comment before each set of cores.
2016-10-06 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def: Add a comment before each
set of cores.
From-SVN: r240846
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 10 |
2 files changed, 15 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 55bb91b..9b581c3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-10-06 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-cores.def: Add a comment before each + set of cores. + 2016-10-06 Kugan Vivekanandarajah <kuganv@linaro.org> PR tree-optimization/77862 diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index d9da257..f7fe1a7 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -40,18 +40,28 @@ /* V8 Architecture Processors. */ +/* ARM ('A') cores. */ AARCH64_CORE("cortex-a35", cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, "0x41", "0xd04") AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03") AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07") AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08") AARCH64_CORE("cortex-a73", cortexa73, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, "0x41", "0xd09") + +/* Samsung ('S') cores. */ AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1, "0x53", "0x001") + +/* Qualcomm ('Q') cores. */ AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, "0x51", "0x800") + +/* Cavium ('C') cores. */ AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1") + +/* APM ('P') cores. */ AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000") /* V8.1 Architecture Processors. */ +/* Broadcom ('B') cores. */ AARCH64_CORE("vulcan", vulcan, cortexa57, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, vulcan, "0x42", "0x516") /* V8 big.LITTLE implementations. */ |