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author | Jeff Law <law@gcc.gnu.org> | 1996-06-10 14:41:40 -0600 |
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committer | Jeff Law <law@gcc.gnu.org> | 1996-06-10 14:41:40 -0600 |
commit | 49ddab16992f33d251e22ec575b936a98e276a0e (patch) | |
tree | c3cff8ed8db4190cdb3b9dce571c98c8ea5b914f /gcc | |
parent | d7ff155ff0a8cf3a291a4b1d8360b6f2b5e302dd (diff) | |
download | gcc-49ddab16992f33d251e22ec575b936a98e276a0e.zip gcc-49ddab16992f33d251e22ec575b936a98e276a0e.tar.gz gcc-49ddab16992f33d251e22ec575b936a98e276a0e.tar.bz2 |
local-alloc.c (update_equiv_regs): Ignore insns that read or write registers that are likely to be spilled.
* local-alloc.c (update_equiv_regs): Ignore insns that read or
write registers that are likely to be spilled.
From-SVN: r12272
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/local-alloc.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/gcc/local-alloc.c b/gcc/local-alloc.c index bde83b2..b8b8b9a 100644 --- a/gcc/local-alloc.c +++ b/gcc/local-alloc.c @@ -973,7 +973,7 @@ update_equiv_regs () { rtx note; rtx set = single_set (insn); - rtx dest; + rtx dest, src; int regno; if (GET_CODE (insn) == NOTE) @@ -989,6 +989,7 @@ update_equiv_regs () continue; dest = SET_DEST (set); + src = SET_SRC (set); /* If this sets a MEM to the contents of a REG that is only used in a single basic block, see if the register is always equivalent @@ -1024,10 +1025,15 @@ update_equiv_regs () optimize_reg_copy_2 (insn, dest, SET_SRC (set)); /* Otherwise, we only handle the case of a pseudo register being set - once. */ + once and only if neither the source nor the destination are + in a register class that's likely to be spilled. */ if (GET_CODE (dest) != REG || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER - || reg_n_sets[regno] != 1) + || reg_n_sets[regno] != 1 + || CLASS_LIKELY_SPILLED_P (reg_preferred_class (REGNO (dest))) + || (GET_CODE (src) == REG + && REGNO (src) >= FIRST_PSEUDO_REGISTER + && CLASS_LIKELY_SPILLED_P (reg_preferred_class (REGNO (src))))) continue; note = find_reg_note (insn, REG_EQUAL, NULL_RTX); |