fold-vec-perm-char.c: New.

[gcc/testsuite]

2017-08-23  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-perm-char.c: New.
	* gcc.target/powerpc/fold-vec-perm-double.c: New.
	* gcc.target/powerpc/fold-vec-perm-float.c: New.
	* gcc.target/powerpc/fold-vec-perm-int.c: New.
	* gcc.target/powerpc/fold-vec-perm-longlong.c: New.
	* gcc.target/powerpc/fold-vec-perm-pixel.c: New.
	* gcc.target/powerpc/fold-vec-perm-short.c: New.

From-SVN: r251310

8 files changed, 182 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 309b4ff..940155a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2017-08-23  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+	* gcc.target/powerpc/fold-vec-perm-char.c: New.
+	* gcc.target/powerpc/fold-vec-perm-double.c: New.
+	* gcc.target/powerpc/fold-vec-perm-float.c: New.
+	* gcc.target/powerpc/fold-vec-perm-int.c: New.
+	* gcc.target/powerpc/fold-vec-perm-longlong.c: New.
+	* gcc.target/powerpc/fold-vec-perm-pixel.c: New.
+	* gcc.target/powerpc/fold-vec-perm-short.c: New.
+
 2017-08-23  Richard Biener  <rguenther@suse.de>
 
 	* g++.dg/cpp1y/constexpr-instantiate.C: Adjust.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c
new file mode 100644
index 0000000..d907eae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-char.c
@@ -0,0 +1,31 @@
+/* Verify that overloaded built-ins for vec_perm with char
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector bool char
+testbc (vector bool char vbc2, vector bool char vbc3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vbc2, vbc3, vuc);
+}
+
+vector signed char
+testsc (vector signed char vsc2, vector signed char vsc3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vsc2, vsc3, vuc);
+}
+
+vector unsigned char
+testuc (vector unsigned char vuc2, vector unsigned char vuc3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vuc2, vuc3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c
new file mode 100644
index 0000000..7ceca9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-double.c
@@ -0,0 +1,17 @@
+/* Verify that overloaded built-ins for vec_perm with double
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+// vector double needs -mvsx.
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
+
+#include <altivec.h>
+
+vector double
+testd (vector double vd2, vector double vd3, vector unsigned char vuc)
+{
+  return vec_perm (vd2, vd3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c
new file mode 100644
index 0000000..c9cfb0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-float.c
@@ -0,0 +1,16 @@
+/* Verify that overloaded built-ins for vec_perm with float
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector float
+testf (vector float vf2, vector float vf3, vector unsigned char vuc)
+{
+  return vec_perm (vf2, vf3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c
new file mode 100644
index 0000000..a2fdc26
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-int.c
@@ -0,0 +1,31 @@
+/* Verify that overloaded built-ins for vec_perm with int
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector bool int
+testbi (vector bool int vbi2, vector bool int vbi3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vbi2, vbi3, vuc);
+}
+
+vector signed int
+testsi (vector signed int vsi2, vector signed int vsi3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vsi2, vsi3, vuc);
+}
+
+vector unsigned int
+testui (vector unsigned int vui2, vector unsigned int vui3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vui2, vui3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c
new file mode 100644
index 0000000..7f3e574
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c
@@ -0,0 +1,32 @@
+/* Verify that overloaded built-ins for vec_perm with long long
+   inputs produce the right code.  */
+
+/* { dg-do compile {target lp64} } */
+// 'long long' in Altivec types is invalid without -mvsx.
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
+
+#include <altivec.h>
+
+vector bool long long
+testbl (vector bool long long vbl2, vector bool long long vbl3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vbl2, vbl3, vuc);
+}
+
+vector signed long long
+testsl (vector signed long vsl2, vector signed long vsl3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vsl2, vsl3, vuc);
+}
+
+vector unsigned long long
+testul (vector unsigned long long vul2, vector unsigned long long vul3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vul2, vul3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c
new file mode 100644
index 0000000..0d3cb0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-pixel.c
@@ -0,0 +1,16 @@
+/* Verify that overloaded built-ins for vec_perm with pixel
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector pixel
+testpx (vector pixel px2, vector pixel px3, vector unsigned char vuc)
+{
+  return vec_perm (px2, px3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c
new file mode 100644
index 0000000..de5303a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-short.c
@@ -0,0 +1,29 @@
+/* Verify that overloaded built-ins for vec_perm with short
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2" } */
+
+#include <altivec.h>
+
+vector bool short
+testbs (vector bool short vbs2, vector bool short vbs3,
+	vector unsigned char vuc)
+{
+  return vec_perm (vbs2, vbs3, vuc);
+}
+
+vector signed short
+testss (vector signed short vss2, vector signed short vss3, vector unsigned char vuc)
+{
+  return vec_perm (vss2, vss3, vuc);
+}
+
+vector unsigned short
+testus (vector unsigned short vus2, vector unsigned short vus3, vector unsigned char vuc)
+{
+  return vec_perm (vus2, vus3, vuc);
+}
+
+/* { dg-final { scan-assembler-times "vperm" 3 } } */