diff options
| author | Richard Henderson <rth@cygnus.com> | 2000-01-25 02:38:41 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2000-01-25 02:38:41 -0800 |
| commit | 41bd3d41301e812200371a73c7eddd1b0f0ddf44 (patch) | |
| tree | d5f73c18cd18fa028b247186bbb2537be5723b03 /gcc | |
| parent | 38544f542a81fc44c6febc3de11949a499ac2f05 (diff) | |
| download | gcc-41bd3d41301e812200371a73c7eddd1b0f0ddf44.zip gcc-41bd3d41301e812200371a73c7eddd1b0f0ddf44.tar.gz gcc-41bd3d41301e812200371a73c7eddd1b0f0ddf44.tar.bz2 | |
alpha.c (secondary_reload_class): Don't allocate a secondary for integral mode memories into FLOAT_REGS.
* alpha.c (secondary_reload_class): Don't allocate a secondary
for integral mode memories into FLOAT_REGS. Rearrange the more
complicated memory expression inward.
From-SVN: r31606
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.c | 18 |
2 files changed, 14 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b14ef14..f89a936 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2000-01-25 Richard Henderson <rth@cygnus.com> + + * alpha.c (secondary_reload_class): Don't allocate a secondary + for integral mode memories into FLOAT_REGS. Rearrange the more + complicated memory expression inward. + 2000-01-25 Zack Weinberg <zack@wolery.cumb.org> * inclhack.def: Fixes to play nicer with FreeBSD, and diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index cbc1688..fa59cc1 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -1095,16 +1095,14 @@ secondary_reload_class (class, mode, x, in) rtx x; int in; { - if (GET_CODE (x) == MEM - || (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) - || (GET_CODE (x) == SUBREG - && (GET_CODE (SUBREG_REG (x)) == MEM - || (GET_CODE (SUBREG_REG (x)) == REG - && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)))) - { - if (class == FLOAT_REGS && mode != DImode) - return GENERAL_REGS; - if ((mode == QImode || mode == HImode) && ! TARGET_BWX) + if ((mode == QImode || mode == HImode) && ! TARGET_BWX) + { + if (GET_CODE (x) == MEM + || (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) + || (GET_CODE (x) == SUBREG + && (GET_CODE (SUBREG_REG (x)) == MEM + || (GET_CODE (SUBREG_REG (x)) == REG + && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)))) { if (!in || !aligned_memory_operand(x, mode)) return GENERAL_REGS; |