sse.md (*avx_<umaxmin:code><mode>3): Split from *avx_<maxmin:code><mode>3.

	* config/i386/sse.md (*avx_<umaxmin:code><mode>3):
	Split from *avx_<maxmin:code><mode>3.
	(*avx_<smaxmin:code><mode>3): Ditto.
	* config/i386/i386.md (maxmin): Remove code iterator.

From-SVN: r164676

4 files changed, 41 insertions, 24 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6c7620e..b60b287 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2010-09-28  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/sse.md (*avx_<umaxmin:code><mode>3):
+	Split from *avx_<maxmin:code><mode>3.
+	(*avx_<smaxmin:code><mode>3): Ditto.
+	* config/i386/i386.md (maxmin): Remove code iterator.
+
 2010-09-27  Ian Lance Taylor  <iant@google.com>
 
 	* config/i386/i386.c (ix86_supports_split_stack): -fsplit-stack
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 51e3754..dfbe1604 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -462,7 +462,7 @@
 
 ;; Set when REX opcode prefix is used.
 (define_attr "prefix_rex" ""
-  (cond [(ne (symbol_ref "!TARGET_64BIT") (const_int 0))
+  (cond [(eq (symbol_ref "TARGET_64BIT") (const_int 0))
 	   (const_int 0)
 	 (and (eq_attr "mode" "DI")
 	      (and (eq_attr "type" "!push,pop,call,callv,leave,ibr")
@@ -713,9 +713,6 @@
 ;; Mapping of unsigned max and min
 (define_code_iterator umaxmin [umax umin])
 
-;; Mapping of signed/unsigned max and min
-(define_code_iterator maxmin [smax smin umax umin])
-
 ;; Base name for integer and FP insn mnemonic
 (define_code_attr maxmin_int [(smax "maxs") (smin "mins")
 			      (umax "maxu") (umin "minu")])
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 56a92bd..60a310b 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -499,19 +499,6 @@
   return true;
 })
 
-;; True for any non-virtual or eliminable register.  Used in places where
-;; instantiation of such a register may cause the pattern to not be recognized.
-(define_predicate "register_no_elim_operand"
-  (match_operand 0 "register_operand")
-{
-  if (GET_CODE (op) == SUBREG)
-    op = SUBREG_REG (op);
-  return !(op == arg_pointer_rtx
-	   || op == frame_pointer_rtx
-	   || IN_RANGE (REGNO (op),
-			FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
-})
-
 ;; P6 processors will jump to the address after the decrement when %esp
 ;; is used as a call operand, so they will execute return address as a code.
 ;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17.
@@ -528,6 +515,19 @@
   return register_no_elim_operand (op, mode);
 })
 
+;; True for any non-virtual or eliminable register.  Used in places where
+;; instantiation of such a register may cause the pattern to not be recognized.
+(define_predicate "register_no_elim_operand"
+  (match_operand 0 "register_operand")
+{
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+  return !(op == arg_pointer_rtx
+	   || op == frame_pointer_rtx
+	   || IN_RANGE (REGNO (op),
+			FIRST_PSEUDO_REGISTER, LAST_VIRTUAL_REGISTER));
+})
+
 ;; Similarly, but include the stack pointer.  This is used to prevent esp
 ;; from being used as an index reg.
 (define_predicate "index_register_operand"
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 0a116aa..1784da9 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6031,18 +6031,16 @@
 
 (define_insn "*avx_<code><mode>3"
   [(set (match_operand:SSEMODE124 0 "register_operand" "=x")
-	(maxmin:SSEMODE124
+	(umaxmin:SSEMODE124
 	  (match_operand:SSEMODE124 1 "nonimmediate_operand" "%x")
 	  (match_operand:SSEMODE124 2 "nonimmediate_operand" "xm")))]
   "TARGET_AVX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
   "vp<maxmin_int><ssevecsize>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sseiadd")
    (set (attr "prefix_extra")
-     (if_then_else
-       (ne (symbol_ref "<MODE>mode != ((<CODE> == SMAX || <CODE> == SMIN) ? V8HImode : V16QImode)")
-	   (const_int 0))
-       (const_string "1")
-       (const_string "0")))
+     (if_then_else (match_operand:V16QI 0 "" "")
+       (const_string "0")
+       (const_string "1")))
    (set_attr "prefix" "vex")
    (set_attr "mode" "TI")])
 
@@ -6065,6 +6063,21 @@
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
+(define_insn "*avx_<code><mode>3"
+  [(set (match_operand:SSEMODE124 0 "register_operand" "=x")
+	(smaxmin:SSEMODE124
+	  (match_operand:SSEMODE124 1 "nonimmediate_operand" "%x")
+	  (match_operand:SSEMODE124 2 "nonimmediate_operand" "xm")))]
+  "TARGET_AVX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
+  "vp<maxmin_int><ssevecsize>\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "type" "sseiadd")
+   (set (attr "prefix_extra")
+     (if_then_else (match_operand:V8HI 0 "" "")
+       (const_string "0")
+       (const_string "1")))
+   (set_attr "prefix" "vex")
+   (set_attr "mode" "TI")])
+
 (define_expand "<code>v8hi3"
   [(set (match_operand:V8HI 0 "register_operand" "")
 	(smaxmin:V8HI
@@ -6917,7 +6930,7 @@
 }
   [(set_attr "type" "sselog")
    (set (attr "prefix_extra")
-     (if_then_else (match_operand:V8HI 0 "register_operand" "")
+     (if_then_else (match_operand:V8HI 0 "" "")
        (const_string "0")
        (const_string "1")))
    (set_attr "length_immediate" "1")