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| author | Jeffrey A Law <law@cygnus.com> | 1998-04-10 09:44:37 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1998-04-10 03:44:37 -0600 |
| commit | 3f51802074c07f2471a46128d0ccf404eb48ecf7 (patch) | |
| tree | 3e98f15426c4edd2424fe6b95c25e1fa9fd1286f /gcc | |
| parent | 7ef3af7613339d05ae0a651c676d0959e0c07895 (diff) | |
| download | gcc-3f51802074c07f2471a46128d0ccf404eb48ecf7.zip gcc-3f51802074c07f2471a46128d0ccf404eb48ecf7.tar.gz gcc-3f51802074c07f2471a46128d0ccf404eb48ecf7.tar.bz2 | |
emit-rtl.c (operand_subword): Properly handle CONST_INTs for 64x32 cross builds.
* emit-rtl.c (operand_subword): Properly handle CONST_INTs for
64x32 cross builds.
From-SVN: r19081
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/emit-rtl.c | 27 |
2 files changed, 27 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e38bdd2..b12483a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,7 @@ -Fri Apr 10 01:29:02 1998 Jeffrey A Law (law@cygnus.com) +Fri Apr 10 10:43:41 1998 Jeffrey A Law (law@cygnus.com) + + * emit-rtl.c (operand_subword): Properly handle CONST_INTs for + 64x32 cross builds. * configure.in: Handle --with-fast-fixincludes. (fixincludes): If --with-fast-fixincludes, then use a different diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index fe99e8e..ef79523 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -1331,11 +1331,30 @@ operand_subword (op, i, validate_address, mode) : (GET_CODE (op) == CONST_INT ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); - /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ + /* Get the value we want into the low bits of val. */ if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) - val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) - & (((HOST_WIDE_INT) 1 - << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); + val = ((val >> ((i % size_ratio) * BITS_PER_WORD))); + + /* Clear the bits that don't belong in our mode, unless they and our sign + bit are all one. So we get either a reasonable negative value or a + reasonable unsigned value for this mode. */ + if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT + && ((val & ((HOST_WIDE_INT) (-1) << (BITS_PER_WORD - 1))) + != ((HOST_WIDE_INT) (-1) << (BITS_PER_WORD - 1)))) + val &= ((HOST_WIDE_INT) 1 << BITS_PER_WORD) - 1; + + /* If this would be an entire word for the target, but is not for + the host, then sign-extend on the host so that the number will look + the same way on the host that it would on the target. + + For example, when building a 64 bit alpha hosted 32 bit sparc + targeted compiler, then we want the 32 bit unsigned value -1 to be + represented as a 64 bit value -1, and not as 0x00000000ffffffff. + The later confuses the sparc backend. */ + + if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT + && (val & ((HOST_WIDE_INT) 1 << (BITS_PER_WORD - 1)))) + val |= ((HOST_WIDE_INT) (-1) << BITS_PER_WORD); return GEN_INT (val); } |