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authorLehua Ding <lehua.ding@rivai.ai>2024-02-02 17:01:20 +0800
committerLehua Ding <lehua.ding@rivai.ai>2024-02-02 17:03:18 +0800
commit3e0b495311e982d349a28322fa305083ef25f866 (patch)
tree3a2c1f852e209905d1f5cf361fd29fb069b27da3 /gcc
parentf4aa644dbbbde8c97f41c8abfbb7925c2242e31f (diff)
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Revert "RISC-V: Allow LICM hoist POLY_INT configuration code sequence"
This reverts commit 74489c19070703361acc20bc172f304cae845a96.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/riscv/riscv.cc9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-1.c18
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-2.c27
3 files changed, 4 insertions, 50 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 3230fe1..d7cdd71 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2728,17 +2728,16 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src)
(const_poly_int:HI [m, n])
(const_poly_int:SI [m, n]). */
rtx tmp = gen_reg_rtx (Pmode);
- rtx tmp2 = gen_reg_rtx (Pmode);
- riscv_legitimize_poly_move (Pmode, tmp2, tmp, src);
- emit_move_insn (dest, gen_lowpart (mode, tmp2));
+ riscv_legitimize_poly_move (Pmode, gen_lowpart (Pmode, dest), tmp,
+ src);
}
else
{
/* In RV32 system, handle (const_poly_int:SI [m, n])
(const_poly_int:DI [m, n]).
In RV64 system, handle (const_poly_int:DI [m, n]).
- FIXME: Maybe we could gen SImode in RV32 and then sign-extend to
- DImode, the offset should not exceed 4GiB in general. */
+ FIXME: Maybe we could gen SImode in RV32 and then sign-extend to DImode,
+ the offset should not exceed 4GiB in general. */
rtx tmp = gen_reg_rtx (mode);
riscv_legitimize_poly_move (mode, dest, tmp, src);
}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-1.c
deleted file mode 100644
index b7da65f..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-1.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
-
-extern int wsize;
-
-typedef unsigned short Posf;
-#define NIL 0
-
-void foo (Posf *p)
-{
- register unsigned n, m;
- do {
- m = *--p;
- *p = (Posf)(m >= wsize ? m-wsize : NIL);
- } while (--n);
-}
-
-/* { dg-final { scan-assembler-times {vid\.v\s+v[0-9]+\s+addi\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*-1\s+vrsub\.vx\s+} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-2.c
deleted file mode 100644
index ffb3c63..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/poly_licm-2.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
-
-typedef unsigned short uint16_t;
-
-void AAA (uint16_t *x, uint16_t *y, unsigned wsize, unsigned count)
-{
- unsigned m = 0, n = count;
- register uint16_t *p;
-
- p = x;
-
- do {
- m = *--p;
- *p = (uint16_t)(m >= wsize ? m-wsize : 0);
- } while (--n);
-
- n = wsize;
- p = y;
-
- do {
- m = *--p;
- *p = (uint16_t)(m >= wsize ? m-wsize : 0);
- } while (--n);
-}
-
-/* { dg-final { scan-assembler-times {vid\.v\s+v[0-9]+\s+vrsub\.vx\s+} 2 } } */