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| author | Roger Sayle <roger@eyesopen.com> | 2006-01-18 02:48:17 +0000 |
|---|---|---|
| committer | Roger Sayle <sayle@gcc.gnu.org> | 2006-01-18 02:48:17 +0000 |
| commit | 3dd0df7f136e41d9b05a1804ba1d01166a3a0a0e (patch) | |
| tree | 1c0dbff3441372f8842a70d08c047e023d3cd63b /gcc | |
| parent | c637eb15a2b0df85f831b3a38dd20e189533684d (diff) | |
| download | gcc-3dd0df7f136e41d9b05a1804ba1d01166a3a0a0e.zip gcc-3dd0df7f136e41d9b05a1804ba1d01166a3a0a0e.tar.gz gcc-3dd0df7f136e41d9b05a1804ba1d01166a3a0a0e.tar.bz2 | |
i386.c (COSTS_N_BYTES): New macro.
* config/i386/i386.c (COSTS_N_BYTES): New macro.
(size_cost): Encode costs in bytes so that a reg-reg addition is
equivalent to COSTS_N_INSNS(1).
(override_options): Use the size_cost.branch_cost as the default
ix86_branch_cost when optimizing for size.
From-SVN: r109867
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 51 |
2 files changed, 35 insertions, 24 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a096147..562486c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2006-01-17 Roger Sayle <roger@eyesopen.com> + + * config/i386/i386.c (COSTS_N_BYTES): New macro. + (size_cost): Encode costs in bytes so that a reg-reg addition is + equivalent to COSTS_N_INSNS(1). + (override_options): Use the size_cost.branch_cost as the default + ix86_branch_cost when optimizing for size. + 2006-01-18 Ben Elliston <bje@au.ibm.com> * Makefile.in (D32PBIT_FUNCS): New. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7f8752f..f4838de 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -63,25 +63,28 @@ Boston, MA 02110-1301, USA. */ : 4) /* Processor costs (relative to an add) */ +/* We assume COSTS_N_INSNS is defined as (N)*4 and an addition is 2 bytes. */ +#define COSTS_N_BYTES(N) ((N) * 2) + static const struct processor_costs size_cost = { /* costs for tunning for size */ - COSTS_N_INSNS (2), /* cost of an add instruction */ - COSTS_N_INSNS (3), /* cost of a lea instruction */ - COSTS_N_INSNS (2), /* variable shift costs */ - COSTS_N_INSNS (3), /* constant shift costs */ - {COSTS_N_INSNS (3), /* cost of starting multiply for QI */ - COSTS_N_INSNS (3), /* HI */ - COSTS_N_INSNS (3), /* SI */ - COSTS_N_INSNS (3), /* DI */ - COSTS_N_INSNS (5)}, /* other */ + COSTS_N_BYTES (2), /* cost of an add instruction */ + COSTS_N_BYTES (3), /* cost of a lea instruction */ + COSTS_N_BYTES (2), /* variable shift costs */ + COSTS_N_BYTES (3), /* constant shift costs */ + {COSTS_N_BYTES (3), /* cost of starting multiply for QI */ + COSTS_N_BYTES (3), /* HI */ + COSTS_N_BYTES (3), /* SI */ + COSTS_N_BYTES (3), /* DI */ + COSTS_N_BYTES (5)}, /* other */ 0, /* cost of multiply per each bit set */ - {COSTS_N_INSNS (3), /* cost of a divide/mod for QI */ - COSTS_N_INSNS (3), /* HI */ - COSTS_N_INSNS (3), /* SI */ - COSTS_N_INSNS (3), /* DI */ - COSTS_N_INSNS (5)}, /* other */ - COSTS_N_INSNS (3), /* cost of movsx */ - COSTS_N_INSNS (3), /* cost of movzx */ + {COSTS_N_BYTES (3), /* cost of a divide/mod for QI */ + COSTS_N_BYTES (3), /* HI */ + COSTS_N_BYTES (3), /* SI */ + COSTS_N_BYTES (3), /* DI */ + COSTS_N_BYTES (5)}, /* other */ + COSTS_N_BYTES (3), /* cost of movsx */ + COSTS_N_BYTES (3), /* cost of movzx */ 0, /* "large" insn */ 2, /* MOVE_RATIO */ 2, /* cost for loading QImode using movzbl */ @@ -106,13 +109,13 @@ struct processor_costs size_cost = { /* costs for tunning for size */ 3, /* MMX or SSE register to integer */ 0, /* size of prefetch block */ 0, /* number of parallel prefetches */ - 1, /* Branch cost */ - COSTS_N_INSNS (2), /* cost of FADD and FSUB insns. */ - COSTS_N_INSNS (2), /* cost of FMUL instruction. */ - COSTS_N_INSNS (2), /* cost of FDIV instruction. */ - COSTS_N_INSNS (2), /* cost of FABS instruction. */ - COSTS_N_INSNS (2), /* cost of FCHS instruction. */ - COSTS_N_INSNS (2), /* cost of FSQRT instruction. */ + 2, /* Branch cost */ + COSTS_N_BYTES (2), /* cost of FADD and FSUB insns. */ + COSTS_N_BYTES (2), /* cost of FMUL instruction. */ + COSTS_N_BYTES (2), /* cost of FDIV instruction. */ + COSTS_N_BYTES (2), /* cost of FABS instruction. */ + COSTS_N_BYTES (2), /* cost of FCHS instruction. */ + COSTS_N_BYTES (2), /* cost of FSQRT instruction. */ }; /* Processor costs (relative to an add) */ @@ -1601,7 +1604,7 @@ override_options (void) } /* Validate -mbranch-cost= value, or provide default. */ - ix86_branch_cost = processor_target_table[ix86_tune].cost->branch_cost; + ix86_branch_cost = ix86_cost->branch_cost; if (ix86_branch_cost_string) { i = atoi (ix86_branch_cost_string); |