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| author | Richard Earnshaw <rearnsha@arm.com> | 2002-07-24 18:29:00 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2002-07-24 18:29:00 +0000 |
| commit | 3ade30eaf7694319bd1acac3d798582d63886d37 (patch) | |
| tree | aaeca542b44499e5b96716a3d459f10e0529b99c /gcc | |
| parent | ce05139c56abbf21a0c8f81150542ed213d07581 (diff) | |
| download | gcc-3ade30eaf7694319bd1acac3d798582d63886d37.zip gcc-3ade30eaf7694319bd1acac3d798582d63886d37.tar.gz gcc-3ade30eaf7694319bd1acac3d798582d63886d37.tar.bz2 | |
arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output pattern.
* arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output
pattern.
(arm_buneq_reversed, arm_bltgt_reversed): Likewise.
(movsicc, movsfcc, movdfcc): FAIL if UNEQ or LTGT.
From-SVN: r55717
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 23 |
2 files changed, 24 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index af8ff60..8c38eb7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2002-07-24 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output + pattern. + (arm_buneq_reversed, arm_bltgt_reversed): Likewise. + (movsicc, movsfcc, movdfcc): FAIL if UNEQ or LTGT. + 2002-07-24 Chris Demetriou <cgd@broadcom.com> * config/mips/elf.h (STARTFILE_SPEC): Never include crt0.o. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 8bd129c..091da69 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6029,7 +6029,7 @@ if (arm_ccfsm_state != 0) abort (); - return \"bvs\\t%l0;beq\\t%l0\"; + return \"bvs\\t%l0\;beq\\t%l0\"; " [(set_attr "conds" "jump_clob") (set_attr "length" "8")] @@ -6046,7 +6046,7 @@ if (arm_ccfsm_state != 0) abort (); - return \"bmi\\t%l0;bgt\\t%l0\"; + return \"bmi\\t%l0\;bgt\\t%l0\"; " [(set_attr "conds" "jump_clob") (set_attr "length" "8")] @@ -6081,7 +6081,7 @@ if (arm_ccfsm_state != 0) abort (); - return \"bmi\\t%l0;bgt\\t%l0\"; + return \"bmi\\t%l0\;bgt\\t%l0\"; " [(set_attr "conds" "jump_clob") (set_attr "length" "8")] @@ -6098,7 +6098,7 @@ if (arm_ccfsm_state != 0) abort (); - return \"bvs\\t%l0;beq\\t%l0\"; + return \"bvs\\t%l0\;beq\\t%l0\"; " [(set_attr "conds" "jump_clob") (set_attr "length" "8")] @@ -6303,8 +6303,12 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); + rtx ccreg; + + if (code == UNEQ || code == LTGT) + FAIL; + ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }" ) @@ -6320,6 +6324,9 @@ enum rtx_code code = GET_CODE (operands[1]); rtx ccreg; + if (code == UNEQ || code == LTGT) + FAIL; + /* When compiling for SOFT_FLOAT, ensure both arms are in registers. Otherwise, ensure it is a valid FP add operand */ if ((!TARGET_HARD_FLOAT) @@ -6340,8 +6347,12 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); + rtx ccreg; + if (code == UNEQ || code == LTGT) + FAIL; + + ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }" ) |