aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorRichard Biener <rguenther@suse.de>2023-01-13 10:01:32 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2023-01-13 10:01:32 +0000
commit3893c9c0a16832f55d8d0827f50c48a56c52f6e7 (patch)
tree371de24e5c921eeddb5cfe9b87986fbfc1a93de0 /gcc
parentadbee4a197c7b735a3dd58cfac8933f70069f71d (diff)
downloadgcc-3893c9c0a16832f55d8d0827f50c48a56c52f6e7.zip
gcc-3893c9c0a16832f55d8d0827f50c48a56c52f6e7.tar.gz
gcc-3893c9c0a16832f55d8d0827f50c48a56c52f6e7.tar.bz2
aarch64: Don't update EH info when folding [PR107209]
The AArch64 folders tried to update EH info on the fly, bypassing the folder's attempts to remove dead EH edges later. This triggered an ICE when folding a potentially-trapping call to a constant. gcc/ PR target/107209 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't update EH info on the fly. gcc/testsuite/ * gcc.target/aarch64/pr107209.c: New test. Co-Authored-By: Richard Biener <rguenther@suse.de>
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/aarch64/aarch64.cc2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/pr107209.c16
2 files changed, 17 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index c8335e7..80b71a7 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -15348,7 +15348,7 @@ aarch64_gimple_fold_builtin (gimple_stmt_iterator *gsi)
if (!new_stmt)
return false;
- gsi_replace (gsi, new_stmt, true);
+ gsi_replace (gsi, new_stmt, false);
return true;
}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr107209.c b/gcc/testsuite/gcc.target/aarch64/pr107209.c
new file mode 100644
index 0000000..b86a6ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr107209.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O2 -fnon-call-exceptions -fno-tree-fre" } */
+
+#include <arm_neon.h>
+
+float64x1_t
+foo (void)
+{
+ float64_t v1 = 3.14159265359;
+ float64_t v2 = 1.383894;
+ float64_t vec_1_data[] = {v1};
+ float64_t vec_2_data[] = {v2};
+ float64x1_t vec_1 = vld1_f64 (vec_1_data);
+ float64x1_t vec_2 = vld1_f64 (vec_2_data);
+
+ return vmulx_f64 (vec_1, vec_2);
+}