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| author | H.J. Lu <hjl.tools@gmail.com> | 2019-04-05 14:57:41 -0700 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-09-18 15:00:12 +0800 |
| commit | 376d69f3f75d2750fa91c0f02f1121c3a8468ffc (patch) | |
| tree | 8eaa56dc8e3e56eae99eb95599da9258fd3b1bec /gcc | |
| parent | ef6ab4abc41268b7065be61a0c4686ae68370883 (diff) | |
| download | gcc-376d69f3f75d2750fa91c0f02f1121c3a8468ffc.zip gcc-376d69f3f75d2750fa91c0f02f1121c3a8468ffc.tar.gz gcc-376d69f3f75d2750fa91c0f02f1121c3a8468ffc.tar.bz2 | |
AVX512FP16: Enable FP16 mask load/store.
gcc/ChangeLog:
* config/i386/sse.md (avx512fmaskmodelower): Extend to support
HF modes.
(maskload<mode><avx512fmaskmodelower>): Ditto.
(maskstore<mode><avx512fmaskmodelower>): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-xorsign-1.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/sse.md | 12 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512fp16-xorsign-1.c | 41 |
2 files changed, 47 insertions, 6 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3b5c05b..bcded09 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -24410,9 +24410,9 @@ "TARGET_AVX") (define_expand "maskload<mode><avx512fmaskmodelower>" - [(set (match_operand:V48_AVX512VL 0 "register_operand") - (vec_merge:V48_AVX512VL - (match_operand:V48_AVX512VL 1 "memory_operand") + [(set (match_operand:V48H_AVX512VL 0 "register_operand") + (vec_merge:V48H_AVX512VL + (match_operand:V48H_AVX512VL 1 "memory_operand") (match_dup 0) (match_operand:<avx512fmaskmode> 2 "register_operand")))] "TARGET_AVX512F") @@ -24435,9 +24435,9 @@ "TARGET_AVX") (define_expand "maskstore<mode><avx512fmaskmodelower>" - [(set (match_operand:V48_AVX512VL 0 "memory_operand") - (vec_merge:V48_AVX512VL - (match_operand:V48_AVX512VL 1 "register_operand") + [(set (match_operand:V48H_AVX512VL 0 "memory_operand") + (vec_merge:V48H_AVX512VL + (match_operand:V48H_AVX512VL 1 "register_operand") (match_dup 0) (match_operand:<avx512fmaskmode> 2 "register_operand")))] "TARGET_AVX512F") diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-xorsign-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-xorsign-1.c new file mode 100644 index 0000000..a22a6ce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-xorsign-1.c @@ -0,0 +1,41 @@ +/* { dg-do run { target avx512fp16 } } */ +/* { dg-options "-O2 -mavx512fp16 -mavx512vl -ftree-vectorize -fdump-tree-vect-details -save-temps" } */ + +extern void abort (); + +static void do_test (void); + +#define DO_TEST do_test +#define AVX512FP16 +#include "avx512-check.h" + +#define N 16 +_Float16 a[N] = {-0.1f, -3.2f, -6.3f, -9.4f, + -12.5f, -15.6f, -18.7f, -21.8f, + 24.9f, 27.1f, 30.2f, 33.3f, + 36.4f, 39.5f, 42.6f, 45.7f}; +_Float16 b[N] = {-1.2f, 3.4f, -5.6f, 7.8f, + -9.0f, 1.0f, -2.0f, 3.0f, + -4.0f, -5.0f, 6.0f, 7.0f, + -8.0f, -9.0f, 10.0f, 11.0f}; +_Float16 r[N]; + +static void +__attribute__ ((noinline, noclone)) +do_test (void) +{ + int i; + + for (i = 0; i < N; i++) + r[i] = a[i] * __builtin_copysignf16 (1.0f, b[i]); + + /* check results: */ + for (i = 0; i < N; i++) + if (r[i] != a[i] * __builtin_copysignf16 (1.0f, b[i])) + abort (); +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { scan-assembler "\[ \t\]xor" } } */ +/* { dg-final { scan-assembler "\[ \t\]and" } } */ +/* { dg-final { scan-assembler-not "copysign" } } */ |