diff options
| author | Richard Henderson <rth@cygnus.com> | 1999-12-08 03:47:38 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1999-12-08 03:47:38 -0800 |
| commit | 35a414df38bfe8df947d399720eef481309540a9 (patch) | |
| tree | 569942f692fcc5dfa864cb67b502cb2da372f199 /gcc | |
| parent | 8dcd865f3b58166136cdd1e0447e410e042e8a23 (diff) | |
| download | gcc-35a414df38bfe8df947d399720eef481309540a9.zip gcc-35a414df38bfe8df947d399720eef481309540a9.tar.gz gcc-35a414df38bfe8df947d399720eef481309540a9.tar.bz2 | |
alpha.c (secondary_reload_class): For !BWX, sub-simode outputs require a register.
* alpha.c (secondary_reload_class): For !BWX, sub-simode
outputs require a register.
From-SVN: r30829
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.c | 26 |
2 files changed, 20 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e8a7f4c..2e284ab 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Wed Dec 8 03:45:40 1999 Richard Henderson <rth@cygnus.com> + + * alpha.c (secondary_reload_class): For !BWX, sub-simode + outputs require a register. + 1999-12-08 Brendan Kehoe <brendan@cygnus.com> * Makefile.in (FPBIT_FUNCS, DPBIT_FUNCS): Add _sf_to_usi diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 5f73964..e790fc0 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -1065,17 +1065,21 @@ secondary_reload_class (class, mode, x, in) rtx x; int in; { - if ((GET_CODE (x) == MEM - || (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) - || (GET_CODE (x) == SUBREG - && (GET_CODE (SUBREG_REG (x)) == MEM - || (GET_CODE (SUBREG_REG (x)) == REG - && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)))) - && ((class == FLOAT_REGS - && (mode == SImode || mode == HImode || mode == QImode)) - || ((mode == QImode || mode == HImode) - && ! TARGET_BWX && ! aligned_memory_operand (x, mode)))) - return GENERAL_REGS; + if (GET_CODE (x) == MEM + || (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) + || (GET_CODE (x) == SUBREG + && (GET_CODE (SUBREG_REG (x)) == MEM + || (GET_CODE (SUBREG_REG (x)) == REG + && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)))) + { + if (class == FLOAT_REGS && mode != DImode) + return GENERAL_REGS; + if ((mode == QImode || mode == HImode) && ! TARGET_BWX) + { + if (!in || !aligned_memory_operand(x, mode)) + return GENERAL_REGS; + } + } if (class == FLOAT_REGS) { |