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| author | liuhongt <hongtao.liu@intel.com> | 2021-04-16 11:29:10 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-04-23 09:19:03 +0800 |
| commit | 342de04d993beaa644d0b0087c20bef5dad5bf5f (patch) | |
| tree | 00ad638566e57e86459401490f633a5bc7bba902 /gcc | |
| parent | e3948473e927a7c3197ce1a63628fe427f15f6c6 (diff) | |
| download | gcc-342de04d993beaa644d0b0087c20bef5dad5bf5f.zip gcc-342de04d993beaa644d0b0087c20bef5dad5bf5f.tar.gz gcc-342de04d993beaa644d0b0087c20bef5dad5bf5f.tar.bz2 | |
MASK_AVX256_SPLIT_UNALIGNED_STORE/LOAD should be cleared in opts->x_target_flags when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled by target attribute.
gcc/ChangeLog:
PR target/100093
* config/i386/i386-options.c (ix86_option_override_internal):
Clear MASK_AVX256_SPLIT_UNALIGNED_LOAD/STORE in x_target_flags
when X86_TUNE_AVX256_UNALIGNED_LOAD/STORE_OPTIMAL is enabled
by target attribute.
gcc/testsuite/ChangeLog:
PR target/100093
* gcc.target/i386/pr100093.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/i386-options.c | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr100093.c | 12 |
2 files changed, 19 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-options.c b/gcc/config/i386/i386-options.c index 2a12228..2f3d40c 100644 --- a/gcc/config/i386/i386-options.c +++ b/gcc/config/i386/i386-options.c @@ -2618,9 +2618,16 @@ ix86_option_override_internal (bool main_args_p, if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_LOAD; + else if (!main_args_p + && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]) + opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_LOAD; + if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL] && !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_STORE)) opts->x_target_flags |= MASK_AVX256_SPLIT_UNALIGNED_STORE; + else if (!main_args_p + && ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL]) + opts->x_target_flags &= ~MASK_AVX256_SPLIT_UNALIGNED_STORE; /* Enable 128-bit AVX instruction generation for the auto-vectorizer. */ diff --git a/gcc/testsuite/gcc.target/i386/pr100093.c b/gcc/testsuite/gcc.target/i386/pr100093.c new file mode 100644 index 0000000..f32a4bc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr100093.c @@ -0,0 +1,12 @@ +/* PR target/100093 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=znver1" } */ +/* { dg-final { scan-assembler-not "vextractf128" } } */ + +__attribute__((target("tune=skylake-avx512"))) +void fill_avx2(double *__restrict__ data, int n, double value) +{ + for (int i = 0; i < n * 16; i++) { + data[i] = value; + } +} |