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author | Andreas Schwab <schwab@gcc.gnu.org> | 2009-12-30 23:03:46 +0000 |
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committer | Andreas Schwab <schwab@gcc.gnu.org> | 2009-12-30 23:03:46 +0000 |
commit | 331fc6d84dc38acba2f660d84260f395a8e6cf29 (patch) | |
tree | f42a6c57b5116eedebfefd29ea73de5d9b79fb97 /gcc | |
parent | d3ae6c2aa243ddbfad69d9decb459a4fa45519cc (diff) | |
download | gcc-331fc6d84dc38acba2f660d84260f395a8e6cf29.zip gcc-331fc6d84dc38acba2f660d84260f395a8e6cf29.tar.gz gcc-331fc6d84dc38acba2f660d84260f395a8e6cf29.tar.bz2 |
re PR target/42516 ([m68k] Suboptimal halfword swap on coldfire)
PR target/42516
* config/m68k/m68k.md (rotlsi_16): New insn.
From-SVN: r155527
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.md | 10 |
2 files changed, 15 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bd540df..7263ff84f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2009-12-30 Andreas Schwab <schwab@linux-m68k.org> + + PR target/42516 + * config/m68k/m68k.md (rotlsi_16): New insn. + 2009-12-30 Joseph Myers <joseph@codesourcery.com> PR c/42439 @@ -8,7 +13,7 @@ 2009-12-30 Ira Rosen <irar@il.ibm.com> PR tree-optimization/41956 - * tree-vect-slp.c (vect_supported_load_permutation_p): Add check that + * tree-vect-slp.c (vect_supported_load_permutation_p): Add check that the load indices differ. 2009-12-30 Uros Bizjak <ubizjak@gmail.com> diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 037bb37..f89037f 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1,6 +1,6 @@ ;;- Machine description for GNU compiler, Motorola 68000 Version ;; Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2001, -;; 2002, 2003, 2004, 2005, 2006, 2007, 2008 +;; 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ;; Free Software Foundation, Inc. ;; This file is part of GCC. @@ -5368,6 +5368,14 @@ ;; rotate instructions +(define_insn "rotlsi_16" + [(set (match_operand:SI 0 "register_operand" "=d") + (rotate:SI (match_operand:SI 1 "register_operand" "0") + (const_int 16)))] + "" + "swap %0" + [(set_attr "type" "shift")]) + (define_insn "rotlsi3" [(set (match_operand:SI 0 "register_operand" "=d") (rotate:SI (match_operand:SI 1 "register_operand" "0") |